summaryrefslogtreecommitdiff
path: root/firmware
diff options
context:
space:
mode:
Diffstat (limited to 'firmware')
-rw-r--r--firmware/target/coldfire/iaudio/x5/system-x5.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/firmware/target/coldfire/iaudio/x5/system-x5.c b/firmware/target/coldfire/iaudio/x5/system-x5.c
index 1d9293b5c5..dee605733f 100644
--- a/firmware/target/coldfire/iaudio/x5/system-x5.c
+++ b/firmware/target/coldfire/iaudio/x5/system-x5.c
@@ -37,7 +37,7 @@ void set_cpu_frequency(long frequency)
37 /* Refresh timer for bypass frequency */ 37 /* Refresh timer for bypass frequency */
38 PLLCR &= ~1; /* Bypass mode */ 38 PLLCR &= ~1; /* Bypass mode */
39 timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false); 39 timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false);
40 PLLCR = 0x13442045; 40 PLLCR = 0x13042045;
41 CSCR0 = 0x00001180; /* Flash: 4 wait states */ 41 CSCR0 = 0x00001180; /* Flash: 4 wait states */
42 CSCR1 = 0x00000980; /* LCD: 2 wait states */ 42 CSCR1 = 0x00000980; /* LCD: 2 wait states */
43 while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked. 43 while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.
@@ -54,7 +54,7 @@ void set_cpu_frequency(long frequency)
54 /* Refresh timer for bypass frequency */ 54 /* Refresh timer for bypass frequency */
55 PLLCR &= ~1; /* Bypass mode */ 55 PLLCR &= ~1; /* Bypass mode */
56 timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false); 56 timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false);
57 PLLCR = 0x16430045; 57 PLLCR = 0x16030045;
58 CSCR0 = 0x00000580; /* Flash: 1 wait state */ 58 CSCR0 = 0x00000580; /* Flash: 1 wait state */
59 CSCR1 = 0x00000180; /* LCD: 0 wait states */ 59 CSCR1 = 0x00000180; /* LCD: 0 wait states */
60 while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked. 60 while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.