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-rw-r--r--firmware/asm/arm/corelock.c3
-rw-r--r--firmware/asm/arm/thread.c3
-rw-r--r--firmware/export/config.h10
-rw-r--r--firmware/target/arm/pcm-telechips.c3
-rw-r--r--firmware/target/arm/pp/pcm-pp.c3
5 files changed, 18 insertions, 4 deletions
diff --git a/firmware/asm/arm/corelock.c b/firmware/asm/arm/corelock.c
index 07ec77a60e..a60299436f 100644
--- a/firmware/asm/arm/corelock.c
+++ b/firmware/asm/arm/corelock.c
@@ -61,7 +61,7 @@ int corelock_try_lock(struct corelock *cl)
61 61
62 /* Relies on the fact that core IDs are complementary bitmasks (0x55,0xaa) */ 62 /* Relies on the fact that core IDs are complementary bitmasks (0x55,0xaa) */
63 asm volatile ( 63 asm volatile (
64 ".syntax unified \n" 64 BEGIN_ARM_ASM_SYNTAX_UNIFIED
65 "mov r1, %[id] \n" /* r1 = PROCESSOR_ID */ 65 "mov r1, %[id] \n" /* r1 = PROCESSOR_ID */
66 "ldrb r1, [r1] \n" 66 "ldrb r1, [r1] \n"
67 "strb r1, [%[cl], r1, lsr #7] \n" /* cl->myl[core] = core */ 67 "strb r1, [%[cl], r1, lsr #7] \n" /* cl->myl[core] = core */
@@ -74,6 +74,7 @@ int corelock_try_lock(struct corelock *cl)
74 "ands %[rv], %[rv], r1 \n" 74 "ands %[rv], %[rv], r1 \n"
75 "strbeq %[rv], [%[cl], r1, lsr #7] \n" /* if not, cl->myl[core] = 0 */ 75 "strbeq %[rv], [%[cl], r1, lsr #7] \n" /* if not, cl->myl[core] = 0 */
76 "1: \n" /* Done */ 76 "1: \n" /* Done */
77 END_ARM_ASM_SYNTAX_UNIFIED
77 : [rv] "=r"(rval) 78 : [rv] "=r"(rval)
78 : [id] "i" (&PROCESSOR_ID), [cl] "r" (cl) 79 : [id] "i" (&PROCESSOR_ID), [cl] "r" (cl)
79 : "r1","r2","cc" 80 : "r1","r2","cc"
diff --git a/firmware/asm/arm/thread.c b/firmware/asm/arm/thread.c
index bd9f950616..30df56e0d9 100644
--- a/firmware/asm/arm/thread.c
+++ b/firmware/asm/arm/thread.c
@@ -73,7 +73,7 @@ static inline void store_context(void* addr)
73static inline void load_context(const void* addr) 73static inline void load_context(const void* addr)
74{ 74{
75 asm volatile( 75 asm volatile(
76 ".syntax unified \n" 76 BEGIN_ARM_ASM_SYNTAX_UNIFIED
77 "ldr r0, [%0, #40] \n" /* Load start pointer */ 77 "ldr r0, [%0, #40] \n" /* Load start pointer */
78 "cmp r0, #0 \n" /* Check for NULL */ 78 "cmp r0, #0 \n" /* Check for NULL */
79 79
@@ -86,6 +86,7 @@ static inline void load_context(const void* addr)
86#endif 86#endif
87 87
88 "ldmia %0, { r4-r11, sp, lr } \n" /* Load regs r4 to r14 from context */ 88 "ldmia %0, { r4-r11, sp, lr } \n" /* Load regs r4 to r14 from context */
89 END_ARM_ASM_SYNTAX_UNIFIED
89 : : "r" (addr) : "r0" /* only! */ 90 : : "r" (addr) : "r0" /* only! */
90 ); 91 );
91} 92}
diff --git a/firmware/export/config.h b/firmware/export/config.h
index 19ee03b4c7..49cd6d610c 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -1005,6 +1005,16 @@ Lyre prototype 1 */
1005#define ROCKBOX_STRICT_ALIGN 1 1005#define ROCKBOX_STRICT_ALIGN 1
1006#endif 1006#endif
1007 1007
1008/*
1009 * These macros are for switching on unified syntax in inline assembly.
1010 * Older versions of GCC emit assembly in divided syntax with no option
1011 * to enable unified syntax.
1012 *
1013 * FIXME: This needs to be looked at after the toolchain bump
1014 */
1015#define BEGIN_ARM_ASM_SYNTAX_UNIFIED ".syntax unified\n"
1016#define END_ARM_ASM_SYNTAX_UNIFIED ".syntax divided\n"
1017
1008#if defined(CPU_ARM) && defined(__ASSEMBLER__) 1018#if defined(CPU_ARM) && defined(__ASSEMBLER__)
1009.syntax unified 1019.syntax unified
1010/* ARMv4T doesn't switch the T bit when popping pc directly, we must use BX */ 1020/* ARMv4T doesn't switch the T bit when popping pc directly, we must use BX */
diff --git a/firmware/target/arm/pcm-telechips.c b/firmware/target/arm/pcm-telechips.c
index 747765d8fb..45044bc664 100644
--- a/firmware/target/arm/pcm-telechips.c
+++ b/firmware/target/arm/pcm-telechips.c
@@ -218,7 +218,7 @@ void fiq_handler(void)
218 * r0-r3 and r12 is a working register. 218 * r0-r3 and r12 is a working register.
219 */ 219 */
220 asm volatile ( 220 asm volatile (
221 ".syntax unified \n" 221 BEGIN_ARM_ASM_SYNTAX_UNIFIED
222 "sub lr, lr, #4 \n" 222 "sub lr, lr, #4 \n"
223 "stmfd sp!, { r0-r3, lr } \n" /* stack scratch regs and lr */ 223 "stmfd sp!, { r0-r3, lr } \n" /* stack scratch regs and lr */
224 "mov r14, #0 \n" /* Was the callback called? */ 224 "mov r14, #0 \n" /* Was the callback called? */
@@ -274,6 +274,7 @@ void fiq_handler(void)
274 "bhi .fill_fifo \n" /* not stop and enough? refill */ 274 "bhi .fill_fifo \n" /* not stop and enough? refill */
275 "ldmfd sp!, { r0-r3, pc }^ \n" /* exit */ 275 "ldmfd sp!, { r0-r3, pc }^ \n" /* exit */
276 ".ltorg \n" 276 ".ltorg \n"
277 END_ARM_ASM_SYNTAX_UNIFIED
277 : : "i"(PCM_DMAST_OK), "i"(PCM_DMAST_STARTED) 278 : : "i"(PCM_DMAST_OK), "i"(PCM_DMAST_STARTED)
278 ); 279 );
279} 280}
diff --git a/firmware/target/arm/pp/pcm-pp.c b/firmware/target/arm/pp/pcm-pp.c
index fd798f0506..94b1c5ae10 100644
--- a/firmware/target/arm/pp/pcm-pp.c
+++ b/firmware/target/arm/pp/pcm-pp.c
@@ -327,7 +327,7 @@ void fiq_playback(void)
327 */ 327 */
328 asm volatile ( 328 asm volatile (
329 /* No external calls */ 329 /* No external calls */
330 ".syntax unified \n" 330 BEGIN_ARM_ASM_SYNTAX_UNIFIED
331 "sub lr, lr, #4 \n" /* Prepare return address */ 331 "sub lr, lr, #4 \n" /* Prepare return address */
332 "stmfd sp!, { lr } \n" /* stack lr so we can use it */ 332 "stmfd sp!, { lr } \n" /* stack lr so we can use it */
333 "ldr r12, =0xcf001040 \n" /* Some magic from iPodLinux ... */ 333 "ldr r12, =0xcf001040 \n" /* Some magic from iPodLinux ... */
@@ -395,6 +395,7 @@ void fiq_playback(void)
395 "bne 3b \n" /* no? -> go return */ 395 "bne 3b \n" /* no? -> go return */
396 "b 2b \n" /* yes -> get even more */ 396 "b 2b \n" /* yes -> get even more */
397 ".ltorg \n" 397 ".ltorg \n"
398 END_ARM_ASM_SYNTAX_UNIFIED
398 : /* These must only be integers! No regs */ 399 : /* These must only be integers! No regs */
399 : "i"(PCM_DMAST_OK), "i"(PCM_DMAST_STARTED)); 400 : "i"(PCM_DMAST_OK), "i"(PCM_DMAST_STARTED));
400} 401}