diff options
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/SOURCES | 4 | ||||
-rw-r--r-- | firmware/kernel.c | 147 | ||||
-rw-r--r-- | firmware/target/arm/kernel-pp.c | 56 | ||||
-rw-r--r-- | firmware/target/arm/pnx0101/kernel-pnx0101.c | 45 | ||||
-rw-r--r-- | firmware/target/coldfire/kernel-coldfire.c | 64 | ||||
-rw-r--r-- | firmware/target/sh/kernel-sh.c | 65 |
6 files changed, 237 insertions, 144 deletions
diff --git a/firmware/SOURCES b/firmware/SOURCES index f2f8526494..53b33406b5 100644 --- a/firmware/SOURCES +++ b/firmware/SOURCES | |||
@@ -267,6 +267,7 @@ drivers/i2c.c | |||
267 | target/sh/adc-sh.c | 267 | target/sh/adc-sh.c |
268 | target/sh/bitswap.S | 268 | target/sh/bitswap.S |
269 | target/sh/crt0.S | 269 | target/sh/crt0.S |
270 | target/sh/kernel-sh.c | ||
270 | target/sh/memcpy-sh.S | 271 | target/sh/memcpy-sh.S |
271 | target/sh/memmove-sh.S | 272 | target/sh/memmove-sh.S |
272 | target/sh/memset-sh.S | 273 | target/sh/memset-sh.S |
@@ -291,6 +292,7 @@ target/coldfire/strlen-coldfire.S | |||
291 | || defined(HAVE_REMOTE_LCD) && (LCD_REMOTE_PIXELFORMAT == VERTICAL_INTERLEAVED) | 292 | || defined(HAVE_REMOTE_LCD) && (LCD_REMOTE_PIXELFORMAT == VERTICAL_INTERLEAVED) |
292 | target/coldfire/memset16-coldfire.S | 293 | target/coldfire/memset16-coldfire.S |
293 | #endif | 294 | #endif |
295 | target/coldfire/kernel-coldfire.c | ||
294 | target/coldfire/system-coldfire.c | 296 | target/coldfire/system-coldfire.c |
295 | #ifndef BOOTLOADER | 297 | #ifndef BOOTLOADER |
296 | target/coldfire/pcm-coldfire.c | 298 | target/coldfire/pcm-coldfire.c |
@@ -322,6 +324,7 @@ target/arm/i2c-telechips.c | |||
322 | #endif | 324 | #endif |
323 | 325 | ||
324 | #if CONFIG_CPU == PNX0101 | 326 | #if CONFIG_CPU == PNX0101 |
327 | target/arm/pnx0101/kernel-pnx0101.c | ||
325 | target/arm/pnx0101/system-pnx0101.c | 328 | target/arm/pnx0101/system-pnx0101.c |
326 | #endif | 329 | #endif |
327 | 330 | ||
@@ -330,6 +333,7 @@ target/arm/as3525/system-as3525.c | |||
330 | #endif | 333 | #endif |
331 | 334 | ||
332 | #if defined(CPU_PP) | 335 | #if defined(CPU_PP) |
336 | target/arm/kernel-pp.c | ||
333 | #if CONFIG_CPU == PP5002 | 337 | #if CONFIG_CPU == PP5002 |
334 | target/arm/system-pp5002.c | 338 | target/arm/system-pp5002.c |
335 | #elif defined CPU_PP502x | 339 | #elif defined CPU_PP502x |
diff --git a/firmware/kernel.c b/firmware/kernel.c index 70b3e03615..dc960b6e51 100644 --- a/firmware/kernel.c +++ b/firmware/kernel.c | |||
@@ -7,7 +7,7 @@ | |||
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id$ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2002 by Björn Stenberg | 10 | * Copyright (C) 2002 by Björn Stenberg |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or | 12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 13 | * modify it under the terms of the GNU General Public License |
@@ -92,150 +92,9 @@ void kernel_init(void) | |||
92 | } | 92 | } |
93 | 93 | ||
94 | /**************************************************************************** | 94 | /**************************************************************************** |
95 | * Timer tick | 95 | * Timer tick - Timer initialization and interrupt handler is defined at |
96 | * the target level. | ||
96 | ****************************************************************************/ | 97 | ****************************************************************************/ |
97 | #if CONFIG_CPU == SH7034 | ||
98 | void tick_start(unsigned int interval_in_ms) | ||
99 | { | ||
100 | unsigned long count; | ||
101 | |||
102 | count = CPU_FREQ * interval_in_ms / 1000 / 8; | ||
103 | |||
104 | if(count > 0x10000) | ||
105 | { | ||
106 | panicf("Error! The tick interval is too long (%d ms)\n", | ||
107 | interval_in_ms); | ||
108 | return; | ||
109 | } | ||
110 | |||
111 | /* We are using timer 0 */ | ||
112 | |||
113 | TSTR &= ~0x01; /* Stop the timer */ | ||
114 | TSNC &= ~0x01; /* No synchronization */ | ||
115 | TMDR &= ~0x01; /* Operate normally */ | ||
116 | |||
117 | TCNT0 = 0; /* Start counting at 0 */ | ||
118 | GRA0 = (unsigned short)(count - 1); | ||
119 | TCR0 = 0x23; /* Clear at GRA match, sysclock/8 */ | ||
120 | |||
121 | /* Enable interrupt on level 1 */ | ||
122 | IPRC = (IPRC & ~0x00f0) | 0x0010; | ||
123 | |||
124 | TSR0 &= ~0x01; | ||
125 | TIER0 = 0xf9; /* Enable GRA match interrupt */ | ||
126 | |||
127 | TSTR |= 0x01; /* Start timer 1 */ | ||
128 | } | ||
129 | |||
130 | void IMIA0(void) __attribute__ ((interrupt_handler)); | ||
131 | void IMIA0(void) | ||
132 | { | ||
133 | /* Run through the list of tick tasks */ | ||
134 | call_tick_tasks(); | ||
135 | |||
136 | TSR0 &= ~0x01; | ||
137 | } | ||
138 | #elif defined(CPU_COLDFIRE) | ||
139 | void tick_start(unsigned int interval_in_ms) | ||
140 | { | ||
141 | unsigned long count; | ||
142 | int prescale; | ||
143 | |||
144 | count = CPU_FREQ/2 * interval_in_ms / 1000 / 16; | ||
145 | |||
146 | if(count > 0x10000) | ||
147 | { | ||
148 | panicf("Error! The tick interval is too long (%d ms)\n", | ||
149 | interval_in_ms); | ||
150 | return; | ||
151 | } | ||
152 | |||
153 | prescale = cpu_frequency / CPU_FREQ; | ||
154 | /* Note: The prescaler is later adjusted on-the-fly on CPU frequency | ||
155 | changes within timer.c */ | ||
156 | |||
157 | /* We are using timer 0 */ | ||
158 | |||
159 | TRR0 = (unsigned short)(count - 1); /* The reference count */ | ||
160 | TCN0 = 0; /* reset the timer */ | ||
161 | TMR0 = 0x001d | ((unsigned short)(prescale - 1) << 8); | ||
162 | /* restart, CLK/16, enabled, prescaler */ | ||
163 | |||
164 | TER0 = 0xff; /* Clear all events */ | ||
165 | |||
166 | ICR1 = 0x8c; /* Interrupt on level 3.0 */ | ||
167 | IMR &= ~0x200; | ||
168 | } | ||
169 | |||
170 | void TIMER0(void) __attribute__ ((interrupt_handler)); | ||
171 | void TIMER0(void) | ||
172 | { | ||
173 | /* Run through the list of tick tasks */ | ||
174 | call_tick_tasks(); | ||
175 | |||
176 | TER0 = 0xff; /* Clear all events */ | ||
177 | } | ||
178 | |||
179 | #elif defined(CPU_PP) | ||
180 | |||
181 | #ifndef BOOTLOADER | ||
182 | void TIMER1(void) | ||
183 | { | ||
184 | /* Run through the list of tick tasks (using main core) */ | ||
185 | TIMER1_VAL; /* Read value to ack IRQ */ | ||
186 | |||
187 | /* Run through the list of tick tasks using main CPU core - | ||
188 | wake up the COP through its control interface to provide pulse */ | ||
189 | call_tick_tasks(); | ||
190 | |||
191 | #if NUM_CORES > 1 | ||
192 | /* Pulse the COP */ | ||
193 | core_wake(COP); | ||
194 | #endif /* NUM_CORES */ | ||
195 | } | ||
196 | #endif | ||
197 | |||
198 | /* Must be last function called init kernel/thread initialization */ | ||
199 | void tick_start(unsigned int interval_in_ms) | ||
200 | { | ||
201 | #ifndef BOOTLOADER | ||
202 | TIMER1_CFG = 0x0; | ||
203 | TIMER1_VAL; | ||
204 | /* enable timer */ | ||
205 | TIMER1_CFG = 0xc0000000 | (interval_in_ms*1000 - 1); | ||
206 | /* unmask interrupt source */ | ||
207 | CPU_INT_EN = TIMER1_MASK; | ||
208 | #else | ||
209 | /* We don't enable interrupts in the bootloader */ | ||
210 | (void)interval_in_ms; | ||
211 | #endif | ||
212 | } | ||
213 | |||
214 | #elif CONFIG_CPU == PNX0101 | ||
215 | |||
216 | void timer_handler(void) | ||
217 | { | ||
218 | /* Run through the list of tick tasks */ | ||
219 | call_tick_tasks(); | ||
220 | |||
221 | TIMER0.clr = 0; | ||
222 | } | ||
223 | |||
224 | void tick_start(unsigned int interval_in_ms) | ||
225 | { | ||
226 | TIMER0.ctrl &= ~0x80; /* Disable the counter */ | ||
227 | TIMER0.ctrl |= 0x40; /* Reload after counting down to zero */ | ||
228 | TIMER0.load = 3000000 * interval_in_ms / 1000; | ||
229 | TIMER0.ctrl &= ~0xc; /* No prescaler */ | ||
230 | TIMER0.clr = 1; /* Clear the interrupt request */ | ||
231 | |||
232 | irq_set_int_handler(IRQ_TIMER0, timer_handler); | ||
233 | irq_enable_int(IRQ_TIMER0); | ||
234 | |||
235 | TIMER0.ctrl |= 0x80; /* Enable the counter */ | ||
236 | } | ||
237 | #endif | ||
238 | |||
239 | int tick_add_task(void (*f)(void)) | 98 | int tick_add_task(void (*f)(void)) |
240 | { | 99 | { |
241 | int oldlevel = disable_irq_save(); | 100 | int oldlevel = disable_irq_save(); |
diff --git a/firmware/target/arm/kernel-pp.c b/firmware/target/arm/kernel-pp.c new file mode 100644 index 0000000000..b9195844ba --- /dev/null +++ b/firmware/target/arm/kernel-pp.c | |||
@@ -0,0 +1,56 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2002 by Björn Stenberg | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include "config.h" | ||
22 | #include "system.h" | ||
23 | #include "kernel.h" | ||
24 | |||
25 | #ifndef BOOTLOADER | ||
26 | void TIMER1(void) | ||
27 | { | ||
28 | /* Run through the list of tick tasks (using main core) */ | ||
29 | TIMER1_VAL; /* Read value to ack IRQ */ | ||
30 | |||
31 | /* Run through the list of tick tasks using main CPU core - | ||
32 | wake up the COP through its control interface to provide pulse */ | ||
33 | call_tick_tasks(); | ||
34 | |||
35 | #if NUM_CORES > 1 | ||
36 | /* Pulse the COP */ | ||
37 | core_wake(COP); | ||
38 | #endif /* NUM_CORES */ | ||
39 | } | ||
40 | #endif | ||
41 | |||
42 | /* Must be last function called init kernel/thread initialization */ | ||
43 | void tick_start(unsigned int interval_in_ms) | ||
44 | { | ||
45 | #ifndef BOOTLOADER | ||
46 | TIMER1_CFG = 0x0; | ||
47 | TIMER1_VAL; | ||
48 | /* enable timer */ | ||
49 | TIMER1_CFG = 0xc0000000 | (interval_in_ms*1000 - 1); | ||
50 | /* unmask interrupt source */ | ||
51 | CPU_INT_EN = TIMER1_MASK; | ||
52 | #else | ||
53 | /* We don't enable interrupts in the bootloader */ | ||
54 | (void)interval_in_ms; | ||
55 | #endif | ||
56 | } | ||
diff --git a/firmware/target/arm/pnx0101/kernel-pnx0101.c b/firmware/target/arm/pnx0101/kernel-pnx0101.c new file mode 100644 index 0000000000..db0f1b0d7f --- /dev/null +++ b/firmware/target/arm/pnx0101/kernel-pnx0101.c | |||
@@ -0,0 +1,45 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2007 by Tomasz Malesinski | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include "config.h" | ||
22 | #include "system.h" | ||
23 | #include "kernel.h" | ||
24 | |||
25 | void timer_handler(void) | ||
26 | { | ||
27 | /* Run through the list of tick tasks */ | ||
28 | call_tick_tasks(); | ||
29 | |||
30 | TIMER0.clr = 0; | ||
31 | } | ||
32 | |||
33 | void tick_start(unsigned int interval_in_ms) | ||
34 | { | ||
35 | TIMER0.ctrl &= ~0x80; /* Disable the counter */ | ||
36 | TIMER0.ctrl |= 0x40; /* Reload after counting down to zero */ | ||
37 | TIMER0.load = 3000000 * interval_in_ms / 1000; | ||
38 | TIMER0.ctrl &= ~0xc; /* No prescaler */ | ||
39 | TIMER0.clr = 1; /* Clear the interrupt request */ | ||
40 | |||
41 | irq_set_int_handler(IRQ_TIMER0, timer_handler); | ||
42 | irq_enable_int(IRQ_TIMER0); | ||
43 | |||
44 | TIMER0.ctrl |= 0x80; /* Enable the counter */ | ||
45 | } | ||
diff --git a/firmware/target/coldfire/kernel-coldfire.c b/firmware/target/coldfire/kernel-coldfire.c new file mode 100644 index 0000000000..093736ee91 --- /dev/null +++ b/firmware/target/coldfire/kernel-coldfire.c | |||
@@ -0,0 +1,64 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2002 by Björn Stenberg | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include "config.h" | ||
22 | #include "system.h" | ||
23 | #include "kernel.h" | ||
24 | #include "panic.h" | ||
25 | |||
26 | void tick_start(unsigned int interval_in_ms) | ||
27 | { | ||
28 | unsigned long count; | ||
29 | int prescale; | ||
30 | |||
31 | count = CPU_FREQ/2 * interval_in_ms / 1000 / 16; | ||
32 | |||
33 | if(count > 0x10000) | ||
34 | { | ||
35 | panicf("Error! The tick interval is too long (%d ms)\n", | ||
36 | interval_in_ms); | ||
37 | return; | ||
38 | } | ||
39 | |||
40 | prescale = cpu_frequency / CPU_FREQ; | ||
41 | /* Note: The prescaler is later adjusted on-the-fly on CPU frequency | ||
42 | changes within timer.c */ | ||
43 | |||
44 | /* We are using timer 0 */ | ||
45 | |||
46 | TRR0 = (unsigned short)(count - 1); /* The reference count */ | ||
47 | TCN0 = 0; /* reset the timer */ | ||
48 | TMR0 = 0x001d | ((unsigned short)(prescale - 1) << 8); | ||
49 | /* restart, CLK/16, enabled, prescaler */ | ||
50 | |||
51 | TER0 = 0xff; /* Clear all events */ | ||
52 | |||
53 | ICR1 = 0x8c; /* Interrupt on level 3.0 */ | ||
54 | IMR &= ~0x200; | ||
55 | } | ||
56 | |||
57 | void TIMER0(void) __attribute__ ((interrupt_handler)); | ||
58 | void TIMER0(void) | ||
59 | { | ||
60 | /* Run through the list of tick tasks */ | ||
61 | call_tick_tasks(); | ||
62 | |||
63 | TER0 = 0xff; /* Clear all events */ | ||
64 | } | ||
diff --git a/firmware/target/sh/kernel-sh.c b/firmware/target/sh/kernel-sh.c new file mode 100644 index 0000000000..905b272fce --- /dev/null +++ b/firmware/target/sh/kernel-sh.c | |||
@@ -0,0 +1,65 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2002 by Björn Stenberg | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include "config.h" | ||
22 | #include "system.h" | ||
23 | #include "kernel.h" | ||
24 | #include "panic.h" | ||
25 | |||
26 | void tick_start(unsigned int interval_in_ms) | ||
27 | { | ||
28 | unsigned long count; | ||
29 | |||
30 | count = CPU_FREQ * interval_in_ms / 1000 / 8; | ||
31 | |||
32 | if(count > 0x10000) | ||
33 | { | ||
34 | panicf("Error! The tick interval is too long (%d ms)\n", | ||
35 | interval_in_ms); | ||
36 | return; | ||
37 | } | ||
38 | |||
39 | /* We are using timer 0 */ | ||
40 | |||
41 | TSTR &= ~0x01; /* Stop the timer */ | ||
42 | TSNC &= ~0x01; /* No synchronization */ | ||
43 | TMDR &= ~0x01; /* Operate normally */ | ||
44 | |||
45 | TCNT0 = 0; /* Start counting at 0 */ | ||
46 | GRA0 = (unsigned short)(count - 1); | ||
47 | TCR0 = 0x23; /* Clear at GRA match, sysclock/8 */ | ||
48 | |||
49 | /* Enable interrupt on level 1 */ | ||
50 | IPRC = (IPRC & ~0x00f0) | 0x0010; | ||
51 | |||
52 | TSR0 &= ~0x01; | ||
53 | TIER0 = 0xf9; /* Enable GRA match interrupt */ | ||
54 | |||
55 | TSTR |= 0x01; /* Start timer 1 */ | ||
56 | } | ||
57 | |||
58 | void IMIA0(void) __attribute__ ((interrupt_handler)); | ||
59 | void IMIA0(void) | ||
60 | { | ||
61 | /* Run through the list of tick tasks */ | ||
62 | call_tick_tasks(); | ||
63 | |||
64 | TSR0 &= ~0x01; | ||
65 | } | ||