2 files changed, 9 insertions, 9 deletions
diff --git a/firmware/target/arm/tms320dm320/boot.lds b/firmware/target/arm/tms320dm320/boot.lds
index c59cc7f514..2db687d533 100644
--- a/firmware/target/arm/tms320dm320/boot.lds
+++ b/firmware/target/arm/tms320dm320/boot.lds
@@ -38,12 +38,12 @@ STARTUP(target/arm/tms320dm320/crt0.o)
 #ifdef SANSA_CONNECT
 /* Offset in flash from beginning, we don't want overwrite OF bootloader
-   due to recovery mode and more importantly - hardware block protection.
+ * due to recovery mode and more importantly - hardware block protection.
-   This offset makes Rockbox bootloader a replacement for OF vmlinux.
+ * Rockbox bootloader is flashed into kernel partition and chainloaded
-   In .srr file header add any valid memory address from following
+ * from OF bootloader via Arbitrary Code Execution exploit. The first
-   <0x1000000; 0x1300180) u (0x131EAF4; 0x1420000) u (0x1440000; 0x5000000>
+ * instruction must be position independent as Rockbox bootloader will be
-   ensuring that complete bootloader fits in.
+ * copied to RAM at 0x01000000 and executed from RAM.
-   Entry point in .srr file should be equal to _loadaddress. */
+ */
 #define FLASHSIZE     0x00400000
 #define FLASHMEMORIG  0x00120010
 /* Kernel partition is 2 M, srr header is 16 bytes, sig is 2048 bytes */
diff --git a/firmware/target/arm/tms320dm320/crt0.S b/firmware/target/arm/tms320dm320/crt0.S
index 9f2c8dbe04..e57e28a470 100644
--- a/firmware/target/arm/tms320dm320/crt0.S
+++ b/firmware/target/arm/tms320dm320/crt0.S
@@ -201,14 +201,14 @@ _start:
    mov     r3, #CACHE_NONE
    bl      map_section
-    /* Enable caching for FLASH */
+    /* Enable write-through caching for FLASH */
    ldr     r0, =_flash_start
    ldr     r1, =_flash_start
    ldr     r2, =_flash_sizem
-    mov     r3, #CACHE_ALL
+    mov     r3, #(CACHE_ALL & ~BUFFERED)
    bl      map_section
-    /* Enable caching for RAM */
+    /* Enable write-back caching for RAM */
    ldr     r0, =_sdram_start
    ldr     r1, =_sdram_start
    ldr     r2, =_sdram_sizem

diff --git a/firmware/target/arm/tms320dm320/boot.lds b/firmware/target/arm/tms320dm320/boot.lds index c59cc7f514..2db687d533 100644 --- a/firmware/target/arm/tms320dm320/boot.lds +++ b/firmware/target/arm/tms320dm320/boot.lds
@@ -38,12 +38,12 @@ STARTUP(target/arm/tms320dm320/crt0.o)
38		38
39	#ifdef SANSA_CONNECT	39	#ifdef SANSA_CONNECT
40	/* Offset in flash from beginning, we don't want overwrite OF bootloader	40	/* Offset in flash from beginning, we don't want overwrite OF bootloader
41	due to recovery mode and more importantly - hardware block protection.	41	* due to recovery mode and more importantly - hardware block protection.
42	This offset makes Rockbox bootloader a replacement for OF vmlinux.	42	* Rockbox bootloader is flashed into kernel partition and chainloaded
43	In .srr file header add any valid memory address from following	43	* from OF bootloader via Arbitrary Code Execution exploit. The first
44	<0x1000000; 0x1300180) u (0x131EAF4; 0x1420000) u (0x1440000; 0x5000000>	44	* instruction must be position independent as Rockbox bootloader will be
45	ensuring that complete bootloader fits in.	45	* copied to RAM at 0x01000000 and executed from RAM.
46	Entry point in .srr file should be equal to _loadaddress. */	46	*/
47	#define FLASHSIZE 0x00400000	47	#define FLASHSIZE 0x00400000
48	#define FLASHMEMORIG 0x00120010	48	#define FLASHMEMORIG 0x00120010
49	/* Kernel partition is 2 M, srr header is 16 bytes, sig is 2048 bytes */	49	/* Kernel partition is 2 M, srr header is 16 bytes, sig is 2048 bytes */


diff --git a/firmware/target/arm/tms320dm320/crt0.S b/firmware/target/arm/tms320dm320/crt0.S index 9f2c8dbe04..e57e28a470 100644 --- a/firmware/target/arm/tms320dm320/crt0.S +++ b/firmware/target/arm/tms320dm320/crt0.S
@@ -201,14 +201,14 @@ _start:
201	mov r3, #CACHE_NONE	201	mov r3, #CACHE_NONE
202	bl map_section	202	bl map_section
203		203
204	/* Enable caching for FLASH */	204	/* Enable write-through caching for FLASH */
205	ldr r0, =_flash_start	205	ldr r0, =_flash_start
206	ldr r1, =_flash_start	206	ldr r1, =_flash_start
207	ldr r2, =_flash_sizem	207	ldr r2, =_flash_sizem
208	mov r3, #CACHE_ALL	208	mov r3, #(CACHE_ALL & ~BUFFERED)
209	bl map_section	209	bl map_section
210		210
211	/* Enable caching for RAM */	211	/* Enable write-back caching for RAM */
212	ldr r0, =_sdram_start	212	ldr r0, =_sdram_start
213	ldr r1, =_sdram_start	213	ldr r1, =_sdram_start
214	ldr r2, =_sdram_sizem	214	ldr r2, =_sdram_sizem