diff options
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/arm/s5l8700/usb-s5l8700.c | 56 | ||||
-rw-r--r-- | firmware/target/arm/usb-s3c6400x.c | 429 |
2 files changed, 429 insertions, 56 deletions
diff --git a/firmware/target/arm/s5l8700/usb-s5l8700.c b/firmware/target/arm/s5l8700/usb-s5l8700.c deleted file mode 100644 index c0bf7a951b..0000000000 --- a/firmware/target/arm/s5l8700/usb-s5l8700.c +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id: usb-fw-pp502x.c 21932 2009-07-17 22:07:06Z roolku $ | ||
9 | * | ||
10 | * Copyright (C) 2009 by ????? | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include "config.h" | ||
22 | #include "usb.h" | ||
23 | #include "cpu.h" | ||
24 | #include "system.h" | ||
25 | #include "string.h" | ||
26 | |||
27 | void usb_init_device(void) | ||
28 | { | ||
29 | } | ||
30 | |||
31 | void usb_enable(bool on) | ||
32 | { | ||
33 | /* This device specific code will eventually give way to proper USB | ||
34 | handling, which should be the same for all S5L870x targets. */ | ||
35 | if (on) | ||
36 | { | ||
37 | #ifdef IPOD_ARCH | ||
38 | /* For iPod, we can only do one thing with USB mode atm - reboot | ||
39 | into the flash-based disk-mode. This does not return. */ | ||
40 | |||
41 | memcpy((void *)0x0002bf00, "diskmodehotstuff\1\0\0\0", 20); | ||
42 | |||
43 | system_reboot(); /* Reboot */ | ||
44 | #endif | ||
45 | } | ||
46 | } | ||
47 | |||
48 | int usb_detect(void) | ||
49 | { | ||
50 | #if defined(IPOD_NANO2G) | ||
51 | if ((PDAT14 & 0x8) == 0x0) | ||
52 | return USB_INSERTED; | ||
53 | #endif | ||
54 | |||
55 | return USB_EXTRACTED; | ||
56 | } | ||
diff --git a/firmware/target/arm/usb-s3c6400x.c b/firmware/target/arm/usb-s3c6400x.c new file mode 100644 index 0000000000..3034cf8029 --- /dev/null +++ b/firmware/target/arm/usb-s3c6400x.c | |||
@@ -0,0 +1,429 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2009 by Michael Sparmann | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #include "config.h" | ||
23 | #include "usb.h" | ||
24 | |||
25 | #define OTGBASE 0x38800000 | ||
26 | #define PHYBASE 0x3C400000 | ||
27 | #include "usb-s3c6400x.h" | ||
28 | |||
29 | #include "cpu.h" | ||
30 | #include "system.h" | ||
31 | #include "kernel.h" | ||
32 | #include "panic.h" | ||
33 | |||
34 | #ifdef HAVE_USBSTACK | ||
35 | #include "usb_ch9.h" | ||
36 | #include "usb_core.h" | ||
37 | #include <inttypes.h> | ||
38 | #include "sprintf.h" | ||
39 | #include "power.h" | ||
40 | |||
41 | struct ep_type | ||
42 | { | ||
43 | bool active; | ||
44 | bool busy; | ||
45 | bool done; | ||
46 | int rc; | ||
47 | int size; | ||
48 | struct wakeup complete; | ||
49 | } ; | ||
50 | |||
51 | static struct ep_type endpoints[5]; | ||
52 | static struct usb_ctrlrequest ctrlreq USB_DEVBSS_ATTR; | ||
53 | |||
54 | int usb_drv_port_speed(void) | ||
55 | { | ||
56 | return (DSTS & 2) == 0 ? 1 : 0; | ||
57 | } | ||
58 | |||
59 | void reset_endpoints(int reinit) | ||
60 | { | ||
61 | unsigned int i; | ||
62 | for (i = 0; i < sizeof(endpoints)/sizeof(struct ep_type); i++) | ||
63 | { | ||
64 | if (reinit) endpoints[i].active = false; | ||
65 | endpoints[i].busy = false; | ||
66 | endpoints[i].rc = -1; | ||
67 | endpoints[i].done = true; | ||
68 | wakeup_signal(&endpoints[i].complete); | ||
69 | } | ||
70 | DIEPCTL0 = 0x8800; /* EP0 IN ACTIVE NEXT=1 */ | ||
71 | DOEPCTL0 = 0x8000; /* EP0 OUT ACTIVE */ | ||
72 | DOEPTSIZ0 = 0x20080040; /* EP0 OUT Transfer Size: | ||
73 | 64 Bytes, 1 Packet, 1 Setup Packet */ | ||
74 | DOEPDMA0 = (uint32_t)&ctrlreq; | ||
75 | DOEPCTL0 |= 0x84000000; /* EP0 OUT ENABLE CLEARNAK */ | ||
76 | if (reinit) | ||
77 | { | ||
78 | /* The size is getting set to zero, because we don't know | ||
79 | whether we are Full Speed or High Speed at this stage */ | ||
80 | /* EP1 IN INACTIVE DATA0 SIZE=0 NEXT=3 */ | ||
81 | DIEPCTL1 = 0x10001800; | ||
82 | /* EP2 OUT INACTIVE DATA0 SIZE=0 */ | ||
83 | DOEPCTL2 = 0x10000000; | ||
84 | /* EP3 IN INACTIVE DATA0 SIZE=0 NEXT=0 */ | ||
85 | DIEPCTL3 = 0x10000000; | ||
86 | /* EP4 OUT INACTIVE DATA0 SIZE=0 */ | ||
87 | DOEPCTL4 = 0x10000000; | ||
88 | } | ||
89 | else | ||
90 | { | ||
91 | /* INACTIVE DATA0 */ | ||
92 | DIEPCTL1 = (DIEPCTL1 & ~0x00008000) | 0x10000000; | ||
93 | DOEPCTL2 = (DOEPCTL2 & ~0x00008000) | 0x10000000; | ||
94 | DIEPCTL3 = (DIEPCTL3 & ~0x00008000) | 0x10000000; | ||
95 | DOEPCTL4 = (DOEPCTL4 & ~0x00008000) | 0x10000000; | ||
96 | } | ||
97 | DAINTMSK = 0xFFFFFFFF; /* Enable interrupts on all EPs */ | ||
98 | } | ||
99 | |||
100 | int usb_drv_request_endpoint(int type, int dir) | ||
101 | { | ||
102 | size_t ep; | ||
103 | int ret = -1; | ||
104 | |||
105 | if (dir == USB_DIR_IN) ep = 1; | ||
106 | else ep = 2; | ||
107 | |||
108 | while (ep < 5) | ||
109 | { | ||
110 | if (!endpoints[ep].active) | ||
111 | { | ||
112 | endpoints[ep].active = true; | ||
113 | ret = ep | dir; | ||
114 | uint32_t newbits = (type << 18) | 0x10000000; | ||
115 | if (dir) DIEPCTL(ep) = (DIEPCTL(ep) & ~0x000C0000) | newbits; | ||
116 | else DOEPCTL(ep) = (DOEPCTL(ep) & ~0x000C0000) | newbits; | ||
117 | break; | ||
118 | } | ||
119 | ep += 2; | ||
120 | } | ||
121 | |||
122 | return ret; | ||
123 | } | ||
124 | |||
125 | void usb_drv_release_endpoint(int ep) | ||
126 | { | ||
127 | ep = ep & 0x7f; | ||
128 | |||
129 | if (ep < 1 || ep > USB_NUM_ENDPOINTS) return; | ||
130 | |||
131 | endpoints[ep].active = false; | ||
132 | } | ||
133 | |||
134 | static void usb_reset(void) | ||
135 | { | ||
136 | volatile int i; | ||
137 | |||
138 | DCTL = 0x802; /* Soft Disconnect */ | ||
139 | |||
140 | OPHYPWR = 0; /* PHY: Power up */ | ||
141 | ORSTCON = 1; /* PHY: Assert Software Reset */ | ||
142 | for (i = 0; i < 50; i++); | ||
143 | ORSTCON = 0; /* PHY: Deassert Software Reset */ | ||
144 | OPHYCLK = 0; /* PHY: 48MHz clock */ | ||
145 | |||
146 | GRSTCTL = 1; /* OTG: Assert Software Reset */ | ||
147 | while (GRSTCTL & 1); /* Wait for OTG to ack reset */ | ||
148 | while (!(GRSTCTL & 0x80000000)); /* Wait for OTG AHB master idle */ | ||
149 | |||
150 | GAHBCFG = 0x27; /* OTG AHB config: Unmask ints, burst length 4, DMA on */ | ||
151 | GUSBCFG = 0x1408; /* OTG: 16bit PHY and some reserved bits */ | ||
152 | |||
153 | DCFG = 4; /* Address 0 */ | ||
154 | DCTL = 0x800; /* Soft Reconnect */ | ||
155 | DIEPMSK = 0x0D; /* IN EP interrupt mask */ | ||
156 | DOEPMSK = 0x0D; /* IN EP interrupt mask */ | ||
157 | GINTMSK = 0xC3000; /* Interrupt mask: IN event, OUT event, bus reset */ | ||
158 | |||
159 | reset_endpoints(1); | ||
160 | } | ||
161 | |||
162 | /* IRQ handler */ | ||
163 | void INT_USB_FUNC(void) | ||
164 | { | ||
165 | int i; | ||
166 | if (GINTSTS & 0x1000) /* bus reset */ | ||
167 | { | ||
168 | DCFG = 4; /* Address 0 */ | ||
169 | reset_endpoints(1); | ||
170 | usb_core_bus_reset(); | ||
171 | } | ||
172 | |||
173 | if (GINTSTS & 0x2000) /* enumeration done, we now know the speed */ | ||
174 | { | ||
175 | /* Set up the maximum packet sizes accordingly */ | ||
176 | uint32_t maxpacket = usb_drv_port_speed() ? 512 : 64; | ||
177 | DIEPCTL1 = (DIEPCTL1 & ~0x000003FF) | maxpacket; | ||
178 | DOEPCTL2 = (DOEPCTL2 & ~0x000003FF) | maxpacket; | ||
179 | DIEPCTL3 = (DIEPCTL3 & ~0x000003FF) | maxpacket; | ||
180 | DOEPCTL4 = (DOEPCTL4 & ~0x000003FF) | maxpacket; | ||
181 | } | ||
182 | |||
183 | if (GINTSTS & 0x40000) /* IN EP event */ | ||
184 | for (i = 0; i < 5; i ++) | ||
185 | if (i != 2 && i != 4 && DIEPINT(i)) | ||
186 | { | ||
187 | if (DIEPINT(i) & 1) /* Transfer completed */ | ||
188 | { | ||
189 | invalidate_dcache(); | ||
190 | int bytes = endpoints[i].size - (DIEPTSIZ(i) & 0x3FFFF); | ||
191 | if (endpoints[i].busy) | ||
192 | { | ||
193 | endpoints[i].busy = false; | ||
194 | endpoints[i].rc = 0; | ||
195 | endpoints[i].done = true; | ||
196 | usb_core_transfer_complete(i, USB_DIR_IN, 0, bytes); | ||
197 | wakeup_signal(&endpoints[i].complete); | ||
198 | } | ||
199 | } | ||
200 | if (DIEPINT(i) & 4) /* AHB error */ | ||
201 | panicf("USB: AHB error on IN EP%d", i); | ||
202 | if (DIEPINT(i) & 8) /* Timeout */ | ||
203 | { | ||
204 | if (endpoints[i].busy) | ||
205 | { | ||
206 | endpoints[i].busy = false; | ||
207 | endpoints[i].rc = 1; | ||
208 | endpoints[i].done = true; | ||
209 | wakeup_signal(&endpoints[i].complete); | ||
210 | } | ||
211 | } | ||
212 | DIEPINT(i) = DIEPINT(i); | ||
213 | } | ||
214 | |||
215 | if (GINTSTS & 0x80000) /* OUT EP event */ | ||
216 | for (i = 0; i < 5; i += 2) | ||
217 | if (DOEPINT(i)) | ||
218 | { | ||
219 | if (DOEPINT(i) & 1) /* Transfer completed */ | ||
220 | { | ||
221 | invalidate_dcache(); | ||
222 | int bytes = endpoints[i].size - (DOEPTSIZ(i) & 0x3FFFF); | ||
223 | if (endpoints[i].busy) | ||
224 | { | ||
225 | endpoints[i].busy = false; | ||
226 | endpoints[i].rc = 0; | ||
227 | endpoints[i].done = true; | ||
228 | usb_core_transfer_complete(i, USB_DIR_OUT, 0, bytes); | ||
229 | wakeup_signal(&endpoints[i].complete); | ||
230 | } | ||
231 | } | ||
232 | if (DOEPINT(i) & 4) /* AHB error */ | ||
233 | panicf("USB: AHB error on OUT EP%d", i); | ||
234 | if (DOEPINT(i) & 8) /* SETUP phase done */ | ||
235 | { | ||
236 | invalidate_dcache(); | ||
237 | if (i == 0) | ||
238 | { | ||
239 | if (ctrlreq.bRequest == 5) | ||
240 | { | ||
241 | /* Already set the new address here, | ||
242 | before passing the packet to the core. | ||
243 | See below (usb_drv_set_address) for details. */ | ||
244 | DCFG = (DCFG & ~0x7F0) | (ctrlreq.wValue << 4); | ||
245 | } | ||
246 | usb_core_control_request(&ctrlreq); | ||
247 | } | ||
248 | else panicf("USB: SETUP done on OUT EP%d!?", i); | ||
249 | } | ||
250 | /* Make sure EP0 OUT is set up to accept the next request */ | ||
251 | if (!i) | ||
252 | { | ||
253 | DOEPTSIZ0 = 0x20080040; | ||
254 | DOEPDMA0 = (uint32_t)&ctrlreq; | ||
255 | DOEPCTL0 |= 0x84000000; | ||
256 | } | ||
257 | DOEPINT(i) = DOEPINT(i); | ||
258 | } | ||
259 | |||
260 | GINTSTS = GINTSTS; | ||
261 | } | ||
262 | |||
263 | void usb_drv_set_address(int address) | ||
264 | { | ||
265 | (void)address; | ||
266 | /* Ignored intentionally, because the controller requires us to set the | ||
267 | new address before sending the response for some reason. So we'll | ||
268 | already set it when the control request arrives, before passing that | ||
269 | into the USB core, which will then call this dummy function. */ | ||
270 | } | ||
271 | |||
272 | void ep_send(int ep, void *ptr, int length) | ||
273 | { | ||
274 | endpoints[ep].busy = true; | ||
275 | endpoints[ep].size = length; | ||
276 | DIEPCTL(ep) |= 0x8000; /* EPx OUT ACTIVE */ | ||
277 | int blocksize = usb_drv_port_speed() ? 512 : 64; | ||
278 | int packets = (length + blocksize - 1) / blocksize; | ||
279 | if (!length) DIEPTSIZ(ep) = 1 << 19; /* one empty packet */ | ||
280 | else DIEPTSIZ(ep) = length | (packets << 19); | ||
281 | DIEPDMA(ep) = (uint32_t)ptr; | ||
282 | clean_dcache(); | ||
283 | DIEPCTL(ep) |= 0x84000000; /* EPx OUT ENABLE CLEARNAK */ | ||
284 | } | ||
285 | |||
286 | void ep_recv(int ep, void *ptr, int length) | ||
287 | { | ||
288 | endpoints[ep].busy = true; | ||
289 | endpoints[ep].size = length; | ||
290 | DOEPCTL(ep) &= ~0x20000; /* EPx UNSTALL */ | ||
291 | DOEPCTL(ep) |= 0x8000; /* EPx OUT ACTIVE */ | ||
292 | int blocksize = usb_drv_port_speed() ? 512 : 64; | ||
293 | int packets = (length + blocksize - 1) / blocksize; | ||
294 | if (!length) DIEPTSIZ(ep) = 1 << 19; /* one empty packet */ | ||
295 | else DOEPTSIZ(ep) = length | (packets << 19); | ||
296 | DOEPDMA(ep) = (uint32_t)ptr; | ||
297 | clean_dcache(); | ||
298 | DOEPCTL(ep) |= 0x84000000; /* EPx OUT ENABLE CLEARNAK */ | ||
299 | } | ||
300 | |||
301 | int usb_drv_send(int endpoint, void *ptr, int length) | ||
302 | { | ||
303 | endpoint &= 0x7f; | ||
304 | endpoints[endpoint].done = false; | ||
305 | ep_send(endpoint, ptr, length); | ||
306 | while (!endpoints[endpoint].done && endpoints[endpoint].busy) | ||
307 | wakeup_wait(&endpoints[endpoint].complete, TIMEOUT_BLOCK); | ||
308 | return endpoints[endpoint].rc; | ||
309 | } | ||
310 | |||
311 | int usb_drv_send_nonblocking(int endpoint, void *ptr, int length) | ||
312 | { | ||
313 | ep_send(endpoint & 0x7f, ptr, length); | ||
314 | return 0; | ||
315 | } | ||
316 | |||
317 | int usb_drv_recv(int endpoint, void* ptr, int length) | ||
318 | { | ||
319 | ep_recv(endpoint & 0x7f, ptr, length); | ||
320 | return 0; | ||
321 | } | ||
322 | |||
323 | void usb_drv_cancel_all_transfers(void) | ||
324 | { | ||
325 | int flags = disable_irq_save(); | ||
326 | reset_endpoints(0); | ||
327 | restore_irq(flags); | ||
328 | } | ||
329 | |||
330 | void usb_drv_set_test_mode(int mode) | ||
331 | { | ||
332 | (void)mode; | ||
333 | } | ||
334 | |||
335 | bool usb_drv_stalled(int endpoint, bool in) | ||
336 | { | ||
337 | if (in) return DIEPCTL(endpoint) & 0x00200000 ? true : false; | ||
338 | else return DOEPCTL(endpoint) & 0x00200000 ? true : false; | ||
339 | } | ||
340 | |||
341 | void usb_drv_stall(int endpoint, bool stall, bool in) | ||
342 | { | ||
343 | if (in) | ||
344 | { | ||
345 | if (stall) DIEPCTL(endpoint) |= 0x00200000; | ||
346 | else DIEPCTL(endpoint) &= ~0x00200000; | ||
347 | } | ||
348 | else | ||
349 | { | ||
350 | if (stall) DOEPCTL(endpoint) |= 0x00200000; | ||
351 | else DOEPCTL(endpoint) &= ~0x00200000; | ||
352 | } | ||
353 | } | ||
354 | |||
355 | void usb_drv_init(void) | ||
356 | { | ||
357 | /* Enable USB clock */ | ||
358 | PWRCON &= ~0x4000; | ||
359 | PWRCONEXT &= ~0x800; | ||
360 | PCGCCTL = 0; | ||
361 | |||
362 | /* unmask irq */ | ||
363 | INTMSK |= INTMSK_USB_OTG; | ||
364 | |||
365 | /* reset the beast */ | ||
366 | usb_reset(); | ||
367 | } | ||
368 | |||
369 | void usb_drv_exit(void) | ||
370 | { | ||
371 | DCTL = 0x802; /* Soft Disconnect */ | ||
372 | |||
373 | OPHYPWR = 0xF; /* PHY: Power down */ | ||
374 | |||
375 | PCGCCTL = 1; /* Mask clocks */ | ||
376 | PWRCON |= 0x4000; | ||
377 | PWRCONEXT |= 0x800; | ||
378 | } | ||
379 | |||
380 | void usb_init_device(void) | ||
381 | { | ||
382 | unsigned int i; | ||
383 | for (i = 0; i < sizeof(endpoints)/sizeof(struct ep_type); i++) | ||
384 | wakeup_init(&endpoints[i].complete); | ||
385 | usb_drv_exit(); | ||
386 | } | ||
387 | |||
388 | void usb_enable(bool on) | ||
389 | { | ||
390 | if (on) usb_core_init(); | ||
391 | else usb_core_exit(); | ||
392 | } | ||
393 | |||
394 | void usb_attach(void) | ||
395 | { | ||
396 | usb_enable(true); | ||
397 | } | ||
398 | |||
399 | int usb_detect(void) | ||
400 | { | ||
401 | if (charger_inserted()) | ||
402 | return USB_INSERTED; | ||
403 | return USB_EXTRACTED; | ||
404 | } | ||
405 | |||
406 | #else | ||
407 | void usb_init_device(void) | ||
408 | { | ||
409 | /* simply switch USB off for now */ | ||
410 | DCTL = 0x802; /* Soft Disconnect */ | ||
411 | |||
412 | OPHYPWR = 0xF; /* PHY: Power down */ | ||
413 | |||
414 | PCGCCTL = 1; /* Mask clocks */ | ||
415 | PWRCON |= 0x4000; | ||
416 | PWRCONEXT |= 0x800; | ||
417 | } | ||
418 | |||
419 | void usb_enable(bool on) | ||
420 | { | ||
421 | (void)on; | ||
422 | } | ||
423 | |||
424 | /* Always return false for now */ | ||
425 | int usb_detect(void) | ||
426 | { | ||
427 | return USB_EXTRACTED; | ||
428 | } | ||
429 | #endif | ||