diff options
Diffstat (limited to 'firmware/target')
| -rw-r--r-- | firmware/target/arm/tms320dm320/creative-zvm/usb-target.h | 76 |
1 files changed, 0 insertions, 76 deletions
diff --git a/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h b/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h index 58c5e5e6da..e69de29bb2 100644 --- a/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h +++ b/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h | |||
| @@ -1,76 +0,0 @@ | |||
| 1 | /*************************************************************************** | ||
| 2 | * __________ __ ___. | ||
| 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
| 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
| 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
| 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
| 7 | * \/ \/ \/ \/ \/ | ||
| 8 | * $Id$ | ||
| 9 | * | ||
| 10 | * Copyright (C) 2008 by Maurus Cuelenaere | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or | ||
| 13 | * modify it under the terms of the GNU General Public License | ||
| 14 | * as published by the Free Software Foundation; either version 2 | ||
| 15 | * of the License, or (at your option) any later version. | ||
| 16 | * | ||
| 17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
| 18 | * KIND, either express or implied. | ||
| 19 | * | ||
| 20 | ****************************************************************************/ | ||
| 21 | |||
| 22 | #ifndef USB_TARGET_H | ||
| 23 | #define USB_TARGET_H | ||
| 24 | |||
| 25 | #include "dm320.h" | ||
| 26 | |||
| 27 | /* General purpose memory region #2 */ | ||
| 28 | #define ISP1583_IOBASE 0x60FFC000 | ||
| 29 | #define ISP1583_H_OVERRIDE | ||
| 30 | |||
| 31 | #define ISP1583_INIT_ADDRESS (*((volatile unsigned char*)(ISP1583_IOBASE+0x0))) //char | ||
| 32 | #define ISP1583_INIT_MODE (*((volatile unsigned short*)(ISP1583_IOBASE+0xC*2))) | ||
| 33 | #define ISP1583_INIT_INTCONF (*((volatile unsigned char*)(ISP1583_IOBASE+0x10*2))) //char | ||
| 34 | #define ISP1583_INIT_OTG (*((volatile unsigned char*)(ISP1583_IOBASE+0x12*2))) //char | ||
| 35 | #define ISP1583_INIT_INTEN_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x14*2))) | ||
| 36 | #define ISP1583_INIT_INTEN_B (*((volatile unsigned short*)(ISP1583_IOBASE+0x14*2+4))) | ||
| 37 | #define ISP1583_INIT_INTEN_READ (unsigned long)( (ISP1583_INIT_INTEN_A & 0xFFFF) | ((ISP1583_INIT_INTEN_B & 0xFFFF) << 16) ) | ||
| 38 | /* Data flow registers */ | ||
| 39 | #define ISP1583_DFLOW_EPINDEX (*((volatile unsigned char*)(ISP1583_IOBASE+0xC2*2))) //char | ||
| 40 | #define ISP1583_DFLOW_CTRLFUN (*((volatile unsigned char*)(ISP1583_IOBASE+0x28*2))) //char | ||
| 41 | #define ISP1583_DFLOW_DATA (*((volatile unsigned short*)(ISP1583_IOBASE+0x20*2))) | ||
| 42 | #define ISP1583_DFLOW_BUFLEN (*((volatile unsigned short*)(ISP1583_IOBASE+0x1C*2))) | ||
| 43 | #define ISP1583_DFLOW_BUFSTAT (*((volatile unsigned char*)(ISP1583_IOBASE+0x1E*2))) //char | ||
| 44 | #define ISP1583_DFLOW_MAXPKSZ (*((volatile unsigned short*)(ISP1583_IOBASE+0x04*2))) | ||
| 45 | #define ISP1583_DFLOW_EPTYPE (*((volatile unsigned short*)(ISP1583_IOBASE+0x08*2))) | ||
| 46 | /* DMA registers */ | ||
| 47 | #define ISP1583_DMA_ENDPOINT (*((volatile unsigned char*)(ISP1583_IOBASE+0x58*2))) | ||
| 48 | /* General registers */ | ||
| 49 | #define ISP1583_GEN_INT_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x18*2))) | ||
| 50 | #define ISP1583_GEN_INT_B (*((volatile unsigned short*)(ISP1583_IOBASE+0x18*2+4))) | ||
| 51 | #define ISP1583_GEN_INT_READ (unsigned long)( (ISP1583_GEN_INT_A & 0xFFFF) | ((ISP1583_GEN_INT_B & 0xFFFF) << 16)) | ||
| 52 | #define ISP1583_GEN_CHIPID_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x70*2))) | ||
| 53 | #define ISP1583_GEN_CHIPID_B (*((volatile unsigned char*)(ISP1583_IOBASE+0x70*2+4))) //char | ||
| 54 | #define ISP1583_GEN_CHIPID (unsigned long)( (ISP1583_GEN_CHIPID_A & 0xFFFF) | ((ISP1583_GEN_CHIPID_B & 0xFFFF) << 16) ) | ||
| 55 | #define ISP1583_GEN_FRAMEN0 (*((volatile unsigned short*)(ISP1583_IOBASE+0x74*2))) | ||
| 56 | #define ISP1583_GEN_SCRATCH (*((volatile unsigned short*)(ISP1583_IOBASE+0x78*2))) | ||
| 57 | #define ISP1583_GEN_UNLCKDEV (*((volatile unsigned short*)(ISP1583_IOBASE+0x7C*2))) | ||
| 58 | #define ISP1583_GEN_TSTMOD (*((volatile unsigned char*)(ISP1583_IOBASE+0x84*2))) //char | ||
| 59 | |||
| 60 | #define EN_INT_CPU_TARGET IO_INTC_EINT1 |= INTR_EINT1_EXT7 | ||
| 61 | #define DIS_INT_CPU_TARGET IO_INTC_EINT1 &= ~INTR_EINT1_EXT7 | ||
| 62 | #define INT_CONF_TARGET 0 | ||
| 63 | //#define INT_CONF_TARGET 2 | ||
| 64 | #define set_int_value(a,b,value) a = value & 0xFFFF; \ | ||
| 65 | b = value >> 16; | ||
| 66 | |||
| 67 | |||
| 68 | /*#define ZVM_SPECIFIC asm volatile( \ | ||
| 69 | "LDR R12, =0x50FFC000\n" \ | ||
| 70 | "LDRH R12, [R12]\n" \ | ||
| 71 | : : : "r12");*/ | ||
| 72 | #define ZVM_SPECIFIC | ||
| 73 | |||
| 74 | #define USE_IRAM | ||
| 75 | |||
| 76 | #endif | ||