diff options
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/crt0.S | 27 |
1 files changed, 14 insertions, 13 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/crt0.S b/firmware/target/mips/ingenic_jz47xx/crt0.S index 7035c5ab0b..16751ba0f6 100644 --- a/firmware/target/mips/ingenic_jz47xx/crt0.S +++ b/firmware/target/mips/ingenic_jz47xx/crt0.S | |||
@@ -60,10 +60,10 @@ | |||
60 | la t2, _bootend | 60 | la t2, _bootend |
61 | _relocate_loop: | 61 | _relocate_loop: |
62 | lw t3, 0(t0) | 62 | lw t3, 0(t0) |
63 | sw t3, 0(t1) | ||
64 | addiu t1, 4 | 63 | addiu t1, 4 |
65 | bne t1, t2, _relocate_loop | ||
66 | addiu t0, 4 | 64 | addiu t0, 4 |
65 | bne t1, t2, _relocate_loop | ||
66 | sw t3, 0(t1) | ||
67 | #endif | 67 | #endif |
68 | 68 | ||
69 | _start: | 69 | _start: |
@@ -104,8 +104,8 @@ _start: | |||
104 | _cache_loop: | 104 | _cache_loop: |
105 | cache 0x8, 0(t0) # index store icache tag | 105 | cache 0x8, 0(t0) # index store icache tag |
106 | cache 0x9, 0(t0) # index store dcache tag | 106 | cache 0x9, 0(t0) # index store dcache tag |
107 | bne t0, t1, _cache_loop | ||
108 | addiu t0, t0, 0x20 # 32 bytes per cache line | 107 | addiu t0, t0, 0x20 # 32 bytes per cache line |
108 | bne t0, t1, _cache_loop | ||
109 | nop | 109 | nop |
110 | 110 | ||
111 | /* | 111 | /* |
@@ -131,11 +131,11 @@ _cache_loop: | |||
131 | la t2, _iramend | 131 | la t2, _iramend |
132 | _iram_loop: | 132 | _iram_loop: |
133 | lw t3, 0(t0) | 133 | lw t3, 0(t0) |
134 | sw t3, 0(t1) | ||
135 | addiu t1, 4 | 134 | addiu t1, 4 |
136 | bne t1, t2, _iram_loop | ||
137 | addiu t0, 4 | 135 | addiu t0, 4 |
138 | 136 | bne t1, t2, _iram_loop | |
137 | sw t3, 0(t1) | ||
138 | |||
139 | /* | 139 | /* |
140 | ---------------------------------------------------- | 140 | ---------------------------------------------------- |
141 | Clear BSS section | 141 | Clear BSS section |
@@ -144,9 +144,9 @@ _iram_loop: | |||
144 | la t0, _edata | 144 | la t0, _edata |
145 | la t1, _end | 145 | la t1, _end |
146 | _bss_loop: | 146 | _bss_loop: |
147 | sw zero, 0(t0) | 147 | addiu t1, -4 |
148 | bne t0, t1, _bss_loop | 148 | bne t0, t1, _bss_loop |
149 | addiu t0, 4 | 149 | sw zero, 0(t1) |
150 | 150 | ||
151 | /* | 151 | /* |
152 | ---------------------------------------------------- | 152 | ---------------------------------------------------- |
@@ -155,12 +155,13 @@ _bss_loop: | |||
155 | */ | 155 | */ |
156 | la sp, stackend | 156 | la sp, stackend |
157 | la t0, stackbegin | 157 | la t0, stackbegin |
158 | li t1, 0xDEADBEEF | 158 | move t1, sp |
159 | li t2, 0xDEADBEEF | ||
159 | 160 | ||
160 | _stack_loop: | 161 | _stack_loop: |
161 | sw t1, 0(t0) | 162 | addiu t1, -4 |
162 | bne t0, sp, _stack_loop | 163 | bne t0, t1, _stack_loop |
163 | addiu t0, t0, 4 | 164 | sw t2, 0(t1) |
164 | 165 | ||
165 | /* | 166 | /* |
166 | ---------------------------------------------------- | 167 | ---------------------------------------------------- |