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-rw-r--r--firmware/target/arm/usb-pp.c103
1 files changed, 16 insertions, 87 deletions
diff --git a/firmware/target/arm/usb-pp.c b/firmware/target/arm/usb-pp.c
index 983457b924..042fb5bda5 100644
--- a/firmware/target/arm/usb-pp.c
+++ b/firmware/target/arm/usb-pp.c
@@ -40,7 +40,7 @@
40#include "hwcompat.h" 40#include "hwcompat.h"
41 41
42#include "usb-target.h" 42#include "usb-target.h"
43#include "mx31.h" 43#include "arcotg_udc.h"
44 44
45void usb_init_device(void) 45void usb_init_device(void)
46{ 46{
@@ -56,30 +56,30 @@ void usb_init_device(void)
56 DEV_INIT |= INIT_USB; 56 DEV_INIT |= INIT_USB;
57 while ((inl(0x70000028) & 0x80) == 0); 57 while ((inl(0x70000028) & 0x80) == 0);
58 58
59 UOG_PORTSC1 |= PORTSCX_PORT_RESET; 59 UDC_PORTSC1 |= PORTSCX_PORT_RESET;
60 while ((UOG_PORTSC1 & PORTSCX_PORT_RESET) != 0); 60 while ((UDC_PORTSC1 & PORTSCX_PORT_RESET) != 0);
61 61
62 UOG_OTGSC |= 0x5F000000; 62 UDC_OTGSC |= 0x5F000000;
63 if( (UOG_OTGSC & 0x100) == 0) { 63 if( (UDC_OTGSC & 0x100) == 0) {
64 UOG_USBMODE &=~ USB_MODE_CTRL_MODE_HOST; 64 UDC_USBMODE &=~ USB_MODE_CTRL_MODE_HOST;
65 UOG_USBMODE |= USB_MODE_CTRL_MODE_DEVICE; 65 UDC_USBMODE |= USB_MODE_CTRL_MODE_DEVICE;
66 outl(inl(0x70000028) | 0x4000, 0x70000028); 66 outl(inl(0x70000028) | 0x4000, 0x70000028);
67 outl(inl(0x70000028) | 0x2, 0x70000028); 67 outl(inl(0x70000028) | 0x2, 0x70000028);
68 } else { 68 } else {
69 UOG_USBMODE |= USB_MODE_CTRL_MODE_DEVICE; 69 UDC_USBMODE |= USB_MODE_CTRL_MODE_DEVICE;
70 outl(inl(0x70000028) &~0x4000, 0x70000028); 70 outl(inl(0x70000028) &~0x4000, 0x70000028);
71 outl(inl(0x70000028) | 0x2, 0x70000028); 71 outl(inl(0x70000028) | 0x2, 0x70000028);
72 } 72 }
73 73
74 74
75 UOG_USBCMD |= USB_CMD_CTRL_RESET; 75 UDC_USBCMD |= USB_CMD_CTRL_RESET;
76 while((UOG_USBCMD & USB_CMD_CTRL_RESET) != 0); 76 while((UDC_USBCMD & USB_CMD_CTRL_RESET) != 0);
77 77
78 r0 = UOG_PORTSC1; 78 r0 = UDC_PORTSC1;
79 79
80 /* Note from IPL source (referring to next 5 lines of code: 80 /* Note from IPL source (referring to next 5 lines of code:
81 THIS NEEDS TO BE CHANGED ONCE THERE IS KERNEL USB */ 81 THIS NEEDS TO BE CHANGED ONCE THERE IS KERNEL USB */
82 outl(inl(0x70000020) | 0x80000000, 0x70000020); 82 DEV_INIT |= INIT_USB;
83 DEV_EN |= DEV_USB; 83 DEV_EN |= DEV_USB;
84 while ((inl(0x70000028) & 0x80) == 0); 84 while ((inl(0x70000028) & 0x80) == 0);
85 outl(inl(0x70000028) | 0x2, 0x70000028); 85 outl(inl(0x70000028) | 0x2, 0x70000028);
@@ -120,100 +120,29 @@ void usb_enable(bool on)
120 } 120 }
121} 121}
122 122
123/*------------------------------------------------------------------
124 Internal Hardware related function
125 ------------------------------------------------------------------*/
126
127/* @qh_addr is the aligned virt addr of ep QH addr
128 * it is used to set endpointlistaddr Reg */
129static int dr_controller_setup(void/* *qh_addr, struct device *dev*/)
130{
131 int timeout = 0;
132/* struct arc_usb_config *config;
133
134 config = udc_controller->config;
135*/
136 /* before here, make sure usb_slave_regs has been initialized */
137/* if (!qh_addr)
138 return -EINVAL;
139*/
140 /* Stop and reset the usb controller */
141 UOG_USBCMD &= ~USB_CMD_RUN_STOP;
142
143 UOG_USBCMD |= USB_CMD_CTRL_RESET;
144
145 /* Wait for reset to complete */
146 timeout = 10000000;
147 while ((UOG_USBCMD & USB_CMD_CTRL_RESET) &&
148 --timeout) {
149 continue;
150 }
151 if (timeout == 0) {
152 //logf("%s: TIMEOUT", __FUNCTION__);
153 return 1;
154 }
155
156 /* Set the controller as device mode and disable setup lockout */
157 UOG_USBMODE |= (USB_MODE_CTRL_MODE_DEVICE | USB_MODE_SETUP_LOCK_OFF);
158
159 /* Clear the setup status */
160 UOG_USBSTS = 0;
161
162/* tmp = virt_to_phys(qh_addr);
163 tmp &= USB_EP_LIST_ADDRESS_MASK;
164 usb_slave_regs->endpointlistaddr = cpu_to_le32(tmp);
165*/
166 UOG_PORTSC1 = (UOG_PORTSC1 & ~PORTSCX_PHY_TYPE_SEL) | PORTSCX_PTS_UTMI;
167
168/* if (config->set_vbus_power)
169 config->set_vbus_power(0);
170*/
171 return 0;
172}
173
174/* just Enable DR irq reg and Set Dr controller Run */
175static void dr_controller_run(void/*struct arcotg_udc *udc*/)
176{
177 /*Enable DR irq reg */
178 UOG_USBINTR = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN |
179 USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN |
180 USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
181
182 /* Clear stopped bit */
183 /*udc->stopped = 0;*/
184
185 /* Set the controller as device mode */
186 UOG_USBMODE |= USB_MODE_CTRL_MODE_DEVICE;
187
188 /* Set controller to Run */
189 UOG_USBCMD |= USB_CMD_RUN_STOP;
190
191 return;
192}
193
194bool usb_detect(void) 123bool usb_detect(void)
195{ 124{
196 static bool prev_usbstatus1 = false; 125 static bool prev_usbstatus1 = false;
197 bool usbstatus1,usbstatus2; 126 bool usbstatus1,usbstatus2;
198 127
199 /* UOG_ID should have the bit format: 128 /* UDC_ID should have the bit format:
200 [31:24] = 0x0 129 [31:24] = 0x0
201 [23:16] = 0x22 (Revision number) 130 [23:16] = 0x22 (Revision number)
202 [15:14] = 0x3 (Reserved) 131 [15:14] = 0x3 (Reserved)
203 [13:8] = 0x3a (NID - 1's compliment of ID) 132 [13:8] = 0x3a (NID - 1's compliment of ID)
204 [7:6] = 0x0 (Reserved) 133 [7:6] = 0x0 (Reserved)
205 [5:0] = 0x05 (ID) */ 134 [5:0] = 0x05 (ID) */
206 if (UOG_ID != 0x22FA05) { 135 if (UDC_ID != 0x22FA05) {
207 return false; 136 return false;
208 } 137 }
209 138
210 usbstatus1 = (UOG_OTGSC & 0x800) ? true : false; 139 usbstatus1 = (UDC_OTGSC & 0x800) ? true : false;
211 if ((usbstatus1 == true) && (prev_usbstatus1 == false)) { 140 if ((usbstatus1 == true) && (prev_usbstatus1 == false)) {
212 dr_controller_setup(); 141 dr_controller_setup();
213 dr_controller_run(); 142 dr_controller_run();
214 } 143 }
215 prev_usbstatus1 = usbstatus1; 144 prev_usbstatus1 = usbstatus1;
216 usbstatus2 = (UOG_PORTSC1 & PORTSCX_CURRENT_CONNECT_STATUS) ? true : false; 145 usbstatus2 = (UDC_PORTSC1 & PORTSCX_CURRENT_CONNECT_STATUS) ? true : false;
217 146
218 if (usbstatus1 && usbstatus2) { 147 if (usbstatus1 && usbstatus2) {
219 return true; 148 return true;