diff options
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/arm/as3525/timer-as3525.c | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/firmware/target/arm/as3525/timer-as3525.c b/firmware/target/arm/as3525/timer-as3525.c new file mode 100644 index 0000000000..755438a1f8 --- /dev/null +++ b/firmware/target/arm/as3525/timer-as3525.c | |||
@@ -0,0 +1,68 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2008 Rafaël Carré | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #include "as3525.h" | ||
23 | #include "timer.h" | ||
24 | #include "stdlib.h" | ||
25 | |||
26 | void INT_TIMER1(void) | ||
27 | { | ||
28 | if (pfn_timer != NULL) | ||
29 | pfn_timer(); | ||
30 | |||
31 | TIMER1_INTCLR = 0; /* clear interrupt */ | ||
32 | } | ||
33 | |||
34 | bool __timer_set(long cycles, bool start) | ||
35 | { | ||
36 | if (start) | ||
37 | { | ||
38 | if (pfn_unregister != NULL) | ||
39 | { | ||
40 | pfn_unregister(); | ||
41 | pfn_unregister = NULL; | ||
42 | } | ||
43 | } | ||
44 | |||
45 | TIMER1_LOAD = TIMER1_BGLOAD = cycles; | ||
46 | /* /!\ bit 4 (reserved) must not be modified | ||
47 | * periodic mode, interrupt enabled, no prescale, 32 bits counter */ | ||
48 | TIMER1_CONTROL = (TIMER1_CONTROL & (1<<4)) | | ||
49 | TIMER_ENABLE | | ||
50 | TIMER_PERIODIC | | ||
51 | TIMER_INT_ENABLE | | ||
52 | TIMER_32_BIT; | ||
53 | return true; | ||
54 | } | ||
55 | |||
56 | bool __timer_register(void) | ||
57 | { | ||
58 | CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */ | ||
59 | VIC_INT_ENABLE |= INTERRUPT_TIMER1; | ||
60 | return true; | ||
61 | } | ||
62 | |||
63 | void __timer_unregister(void) | ||
64 | { | ||
65 | TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */ | ||
66 | VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */ | ||
67 | CGU_PERI &= ~CGU_TIMER1_CLOCK_ENABLE; /* disable peripheral */ | ||
68 | } | ||