diff options
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/arm/pcm-pp.c | 49 | ||||
-rw-r--r-- | firmware/target/arm/wmcodec-pp.c | 10 |
2 files changed, 44 insertions, 15 deletions
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c index 5ac15fe00c..42b9aeb6cb 100644 --- a/firmware/target/arm/pcm-pp.c +++ b/firmware/target/arm/pcm-pp.c | |||
@@ -168,7 +168,8 @@ void fiq(void) | |||
168 | 168 | ||
169 | do { | 169 | do { |
170 | while (p_size) { | 170 | while (p_size) { |
171 | if (FIFO_FREE_COUNT < 2) { | 171 | //if (FIFO_FREE_COUNT < 2) { |
172 | if (((IISFIFO_CFG & (0x1f << 16)) >> 16) < 2) { | ||
172 | /* Enable interrupt */ | 173 | /* Enable interrupt */ |
173 | #ifdef CPU_PP502x | 174 | #ifdef CPU_PP502x |
174 | IISCONFIG |= (1 << 1); | 175 | IISCONFIG |= (1 << 1); |
@@ -219,8 +220,10 @@ void pcm_play_dma_start(const void *addr, size_t size) | |||
219 | set_fiq_handler(fiq); | 220 | set_fiq_handler(fiq); |
220 | enable_fiq(); | 221 | enable_fiq(); |
221 | 222 | ||
223 | #if CONFIG_CPU == PP5020 | ||
224 | /* Do nothing */ | ||
225 | #elif defined(CPU_PP502x) | ||
222 | /* Enable playback FIFO */ | 226 | /* Enable playback FIFO */ |
223 | #ifdef CPU_PP502x | ||
224 | IISCONFIG |= (1 << 29); | 227 | IISCONFIG |= (1 << 29); |
225 | #elif CONFIG_CPU == PP5002 | 228 | #elif CONFIG_CPU == PP5002 |
226 | IISCONFIG |= 0x4; | 229 | IISCONFIG |= 0x4; |
@@ -257,11 +260,13 @@ void pcm_play_dma_stop(void) | |||
257 | if (!audio_status()) | 260 | if (!audio_status()) |
258 | pcm_paused = false; | 261 | pcm_paused = false; |
259 | 262 | ||
260 | #ifdef CPU_PP502x | 263 | #if CONFIG_CPU == PP5020 |
264 | /* Disable TX interrupt */ | ||
265 | IISCONFIG &= ~(1 << 1); | ||
266 | #elif defined(CPU_PP502x) | ||
261 | /* Disable playback FIFO and interrupt */ | 267 | /* Disable playback FIFO and interrupt */ |
262 | IISCONFIG &= ~((1 << 29) | (1 << 1)); | 268 | IISCONFIG &= ~((1 << 29) | (1 << 1)); |
263 | #elif CONFIG_CPU == PP5002 | 269 | #elif CONFIG_CPU == PP5002 |
264 | |||
265 | /* Disable playback FIFO */ | 270 | /* Disable playback FIFO */ |
266 | IISCONFIG &= ~0x4; | 271 | IISCONFIG &= ~0x4; |
267 | 272 | ||
@@ -274,7 +279,10 @@ void pcm_play_dma_stop(void) | |||
274 | 279 | ||
275 | void pcm_play_pause_pause(void) | 280 | void pcm_play_pause_pause(void) |
276 | { | 281 | { |
277 | #ifdef CPU_PP502x | 282 | #if CONFIG_CPU == PP5020 |
283 | /* Disable TX interrupt */ | ||
284 | IISCONFIG &= ~(1 << 1); | ||
285 | #elif defined(CPU_PP502x) | ||
278 | /* Disable playback FIFO and interrupt */ | 286 | /* Disable playback FIFO and interrupt */ |
279 | IISCONFIG &= ~((1 << 29) | (1 << 1)); | 287 | IISCONFIG &= ~((1 << 29) | (1 << 1)); |
280 | #elif CONFIG_CPU == PP5002 | 288 | #elif CONFIG_CPU == PP5002 |
@@ -293,8 +301,10 @@ void pcm_play_pause_unpause(void) | |||
293 | set_fiq_handler(fiq); | 301 | set_fiq_handler(fiq); |
294 | enable_fiq(); | 302 | enable_fiq(); |
295 | 303 | ||
304 | #if CONFIG_CPU == PP5020 | ||
305 | /* Do nothing */ | ||
306 | #elif defined(CPU_PP502x) | ||
296 | /* Enable playback FIFO */ | 307 | /* Enable playback FIFO */ |
297 | #ifdef CPU_PP502x | ||
298 | IISCONFIG |= (1 << 29); | 308 | IISCONFIG |= (1 << 29); |
299 | #elif CONFIG_CPU == PP5002 | 309 | #elif CONFIG_CPU == PP5002 |
300 | IISCONFIG |= 0x4; | 310 | IISCONFIG |= 0x4; |
@@ -344,14 +354,20 @@ void pcm_init(void) | |||
344 | /* Initialize default register values. */ | 354 | /* Initialize default register values. */ |
345 | audiohw_init(); | 355 | audiohw_init(); |
346 | 356 | ||
357 | #ifndef HAVE_WM8731 | ||
347 | /* Power on */ | 358 | /* Power on */ |
348 | audiohw_enable_output(true); | 359 | audiohw_enable_output(true); |
349 | |||
350 | /* Unmute the master channel (DAC should be at zero point now). */ | 360 | /* Unmute the master channel (DAC should be at zero point now). */ |
351 | audiohw_mute(false); | 361 | audiohw_mute(false); |
362 | #endif | ||
352 | 363 | ||
353 | /* Call pcm_play_dma_stop to initialize everything. */ | 364 | /* Call pcm_play_dma_stop to initialize everything. */ |
354 | pcm_play_dma_stop(); | 365 | pcm_play_dma_stop(); |
366 | |||
367 | #if CONFIG_CPU == PP5020 | ||
368 | /* This processor doesn't like this disabled */ | ||
369 | IISCONFIG |= (1 << 29); | ||
370 | #endif | ||
355 | } | 371 | } |
356 | 372 | ||
357 | void pcm_postinit(void) | 373 | void pcm_postinit(void) |
@@ -438,12 +454,15 @@ fiq_record_exit: | |||
438 | #else | 454 | #else |
439 | static short peak_l, peak_r IBSS_ATTR; | 455 | static short peak_l, peak_r IBSS_ATTR; |
440 | 456 | ||
441 | void fiq_record(void) ICODE_ATTR __attribute__ ((interrupt ("FIQ"))); | 457 | /* Temporary to stop playback crashing after record */ |
458 | void fiq_record(void) ICODE_ATTR __attribute__((naked)); | ||
442 | void fiq_record(void) | 459 | void fiq_record(void) |
443 | { | 460 | { |
444 | short value; | 461 | asm volatile ("stmfd sp!, {r0-r7, r11, ip, lr} \n"); /* Store context */ |
445 | pcm_more_callback_type2 more_ready; | 462 | |
446 | int status = 0; | 463 | register short value; |
464 | register pcm_more_callback_type2 more_ready; | ||
465 | register int status = 0; | ||
447 | 466 | ||
448 | /* Clear interrupt */ | 467 | /* Clear interrupt */ |
449 | #ifdef CPU_PP502x | 468 | #ifdef CPU_PP502x |
@@ -460,7 +479,7 @@ void fiq_record(void) | |||
460 | #elif CONFIG_CPU == PP5002 | 479 | #elif CONFIG_CPU == PP5002 |
461 | /* TODO */ | 480 | /* TODO */ |
462 | #endif | 481 | #endif |
463 | return; | 482 | goto fiq_record_exit; |
464 | } | 483 | } |
465 | 484 | ||
466 | value = (unsigned short)(IISFIFO_RD >> 16); | 485 | value = (unsigned short)(IISFIFO_RD >> 16); |
@@ -486,10 +505,14 @@ void fiq_record(void) | |||
486 | more_ready = pcm_callback_more_ready; | 505 | more_ready = pcm_callback_more_ready; |
487 | 506 | ||
488 | if (more_ready != NULL && more_ready(status) >= 0) | 507 | if (more_ready != NULL && more_ready(status) >= 0) |
489 | return; | 508 | goto fiq_record_exit; |
490 | 509 | ||
491 | /* Finished recording */ | 510 | /* Finished recording */ |
492 | pcm_rec_dma_stop(); | 511 | pcm_rec_dma_stop(); |
512 | |||
513 | fiq_record_exit: | ||
514 | asm volatile("ldmfd sp!, {r0-r7, r11, ip, lr} \n" /* Restore context */ | ||
515 | "subs pc, lr, #4 \n"); /* Return from FIQ */ | ||
493 | } | 516 | } |
494 | 517 | ||
495 | #endif /* HAVE_AS3514 */ | 518 | #endif /* HAVE_AS3514 */ |
diff --git a/firmware/target/arm/wmcodec-pp.c b/firmware/target/arm/wmcodec-pp.c index 455e3e1087..a2c83f33b3 100644 --- a/firmware/target/arm/wmcodec-pp.c +++ b/firmware/target/arm/wmcodec-pp.c | |||
@@ -25,6 +25,7 @@ | |||
25 | ****************************************************************************/ | 25 | ****************************************************************************/ |
26 | 26 | ||
27 | #include "system.h" | 27 | #include "system.h" |
28 | #include "audiohw.h" | ||
28 | #include "i2c-pp.h" | 29 | #include "i2c-pp.h" |
29 | 30 | ||
30 | #if defined(IRIVER_H10) || defined(IRIVER_H10_5GB) | 31 | #if defined(IRIVER_H10) || defined(IRIVER_H10_5GB) |
@@ -39,7 +40,7 @@ | |||
39 | /* | 40 | /* |
40 | * Initialise the PP I2C and I2S. | 41 | * Initialise the PP I2C and I2S. |
41 | */ | 42 | */ |
42 | int audiohw_init(void) { | 43 | void audiohw_init(void) { |
43 | /* reset I2C */ | 44 | /* reset I2C */ |
44 | i2c_init(); | 45 | i2c_init(); |
45 | 46 | ||
@@ -95,12 +96,17 @@ int audiohw_init(void) { | |||
95 | #endif /* IPOD_1G2G/3G */ | 96 | #endif /* IPOD_1G2G/3G */ |
96 | #endif | 97 | #endif |
97 | 98 | ||
98 | return 0; | 99 | #ifdef HAVE_WM8731 |
100 | audiohw_preinit(); | ||
101 | #endif | ||
102 | |||
99 | } | 103 | } |
100 | 104 | ||
105 | #ifndef HAVE_WM8731 | ||
101 | void audiohw_postinit(void) | 106 | void audiohw_postinit(void) |
102 | { | 107 | { |
103 | } | 108 | } |
109 | #endif | ||
104 | 110 | ||
105 | void wmcodec_write(int reg, int data) | 111 | void wmcodec_write(int reg, int data) |
106 | { | 112 | { |