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-rwxr-xr-xfirmware/target/sh/archos/ata-archos.c76
-rwxr-xr-xfirmware/target/sh/archos/ata-as-archos.S231
-rwxr-xr-xfirmware/target/sh/archos/ata-target.h80
3 files changed, 387 insertions, 0 deletions
diff --git a/firmware/target/sh/archos/ata-archos.c b/firmware/target/sh/archos/ata-archos.c
new file mode 100755
index 0000000000..73e56b8d84
--- /dev/null
+++ b/firmware/target/sh/archos/ata-archos.c
@@ -0,0 +1,76 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19
20#include "config.h"
21#include "cpu.h"
22#include <stdbool.h>
23#include "kernel.h"
24#include "system.h"
25#include "ata-target.h"
26#include "hwcompat.h"
27
28volatile unsigned char* ata_control;
29int ata_io_address; /* 0x300 or 0x200 */
30
31void ata_reset(void)
32{
33 /* state HRR0 */
34 and_b(~0x02, &PADRH); /* assert _RESET */
35 sleep(1); /* > 25us */
36
37 /* state HRR1 */
38 or_b(0x02, &PADRH); /* negate _RESET */
39 sleep(1); /* > 2ms */
40}
41
42void ata_address_detect(void)
43{
44 if (read_hw_mask() & ATA_ADDRESS_200)
45 {
46 ata_io_address = 0x200; /* For debug purposes only */
47 ata_control = ATA_CONTROL1;
48 }
49 else
50 {
51 ata_io_address = 0x300; /* For debug purposes only */
52 ata_control = ATA_CONTROL2;
53 }
54}
55
56void ata_enable(bool on)
57{
58 if(on)
59 and_b(~0x80, &PADRL); /* enable ATA */
60 else
61 or_b(0x80, &PADRL); /* disable ATA */
62
63 or_b(0x80, &PAIORL);
64}
65
66void ata_device_init(void)
67{
68 or_b(0x02, &PAIORH); /* output for ATA reset */
69 or_b(0x02, &PADRH); /* release ATA reset */
70 PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */
71}
72
73bool ata_is_coldstart(void)
74{
75 return (PACR2 & 0x4000) != 0;
76}
diff --git a/firmware/target/sh/archos/ata-as-archos.S b/firmware/target/sh/archos/ata-as-archos.S
new file mode 100755
index 0000000000..4a4e7e4b94
--- /dev/null
+++ b/firmware/target/sh/archos/ata-as-archos.S
@@ -0,0 +1,231 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2004-2006 by Jens Arnold
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19
20 .section .icode,"ax",@progbits
21
22 .align 2
23 .global _copy_read_sectors
24 .type _copy_read_sectors,@function
25
26/* Read a number of words from the ATA data port
27 *
28 * Assumes wordcount to be a multiple of 4
29 *
30 * Arguments:
31 * r4 - buffer address
32 * r5 - word count
33 *
34 * Register usage:
35 * r0 - scratch
36 * r1/r2 - read buffers
37 * r3 - mask (if unaligned)
38 * r4 - current address
39 * r5 - end address
40 * r6 - ata port
41 */
42
43_copy_read_sectors:
44 add r5, r5 /* words -> bytes */
45 add r4, r5 /* bytes -> end address */
46 add #-12, r5 /* adjust for offsets */
47 mov.l .ata_data, r6
48
49 mov r4, r0
50 tst #1, r0 /* 16-bit aligned ? */
51 bt .r_aligned /* yes, do word copy */
52
53 /* not 16-bit aligned */
54 mov #-1, r3 /* prepare a bit mask for high byte */
55 shll8 r3 /* r3 = 0xFFFFFF00 */
56
57 mov.w @r6, r2 /* read first word (1st round) */
58 mov.b r2, @r4 /* store low byte of first word */
59 bra .r_start_b /* jump into loop after next instr. */
60 add #-5, r4 /* adjust for dest. offsets; now even */
61
62 .align 2
63.r_loop_b: /* main loop: copy 4 words in a row */
64 mov.w @r6, r2 /* read first word (2+ round) */
65 and r3, r1 /* get high byte of fourth word (2+ round) */
66 extu.b r2, r0 /* get low byte of first word (2+ round) */
67 or r1, r0 /* combine with high byte of fourth word */
68 mov.w r0, @(4, r4) /* store at buf[4] */
69 nop /* maintain alignment */
70.r_start_b:
71 mov.w @r6, r1 /* read second word */
72 and r3, r2 /* get high byte of first word */
73 extu.b r1, r0 /* get low byte of second word */
74 or r2, r0 /* combine with high byte of first word */
75 mov.w r0, @(6, r4) /* store at buf[6] */
76 add #8, r4 /* buf += 8 */
77 mov.w @r6, r2 /* read third word */
78 and r3, r1 /* get high byte of second word */
79 extu.b r2, r0 /* get low byte of third word */
80 or r1, r0 /* combine with high byte of second word */
81 mov.w r0, @r4 /* store at buf[0] */
82 cmp/hi r4, r5 /* check for end */
83 mov.w @r6, r1 /* read fourth word */
84 and r3, r2 /* get high byte of third word */
85 extu.b r1, r0 /* get low byte of fourth word */
86 or r2, r0 /* combine with high byte of third word */
87 mov.w r0, @(2, r4) /* store at buf[2] */
88 bt .r_loop_b
89 /* 24 instructions for 4 copies, takes 30 clock cycles (4 wait) */
90 /* avg. 7.5 cycles per word */
91
92 swap.b r1, r0 /* get high byte of last word */
93 rts
94 mov.b r0, @(4, r4) /* and store it */
95
96 /* 16-bit aligned, loop(read and store word) */
97.r_aligned:
98 mov.w @r6, r2 /* read first word (1st round) */
99 bra .r_start_w /* jump into loop after next instr. */
100 add #-6, r4 /* adjust for destination offsets */
101
102 .align 2
103.r_loop_w: /* main loop: copy 4 words in a row */
104 mov.w @r6, r2 /* read first word (2+ round) */
105 swap.b r1, r0 /* swap fourth word (2+ round) */
106 mov.w r0, @(4, r4) /* store fourth word (2+ round) */
107 nop /* maintain alignment */
108.r_start_w:
109 mov.w @r6, r1 /* read second word */
110 swap.b r2, r0 /* swap first word */
111 mov.w r0, @(6, r4) /* store first word in buf[6] */
112 add #8, r4 /* buf += 8 */
113 mov.w @r6, r2 /* read third word */
114 swap.b r1, r0 /* swap second word */
115 mov.w r0, @r4 /* store second word in buf[0] */
116 cmp/hi r4, r5 /* check for end */
117 mov.w @r6, r1 /* read fourth word */
118 swap.b r2, r0 /* swap third word */
119 mov.w r0, @(2, r4) /* store third word */
120 bt .r_loop_w
121 /* 16 instructions for 4 copies, takes 22 clock cycles (4 wait) */
122 /* avg. 5.5 cycles per word */
123
124 swap.b r1, r0 /* swap fourth word (last round) */
125 rts
126 mov.w r0, @(4, r4) /* and store it */
127
128.r_end:
129 .size _copy_read_sectors,.r_end-_copy_read_sectors
130
131 .align 2
132 .global _copy_write_sectors
133 .type _copy_write_sectors,@function
134
135/* Write a number of words to the ATA data port
136 *
137 * Assumes wordcount to be a multiple of 2.
138 * Writing is not unrolled as much as reading, for several reasons:
139 *
140 * - a similar instruction sequence is faster for writing than for reading
141 * because the auto-incrementing load inctructions can be used
142 * - writing profits from warp mode
143 *
144 * Both of these add up to have writing faster than the more unrolled reading.
145 *
146 * Arguments:
147 * r4 - buffer address
148 * r5 - word count
149 *
150 * Register usage:
151 * r0/r1 - scratch
152 * r2/r3 - write buffers
153 * r4 - current address
154 * r5 - end address
155 * r6 - mask (if unaligned)
156 * r7 - ata port
157 */
158
159_copy_write_sectors:
160 add r5, r5 /* words -> bytes */
161 add r4, r5 /* bytes -> end address */
162 add #-4, r5 /* adjust for offsets */
163 mov.l .ata_data, r7
164
165 mov r4, r0
166 tst #1, r0 /* 16-bit aligned ? */
167 bt .w_aligned /* yes, do word copy */
168
169 /* not 16-bit aligned */
170 mov #-1, r6 /* prepare a bit mask for high byte */
171 shll8 r6 /* r6 = 0xFFFFFF00 */
172
173 mov.b @r4+, r2 /* load (initial old second) first byte */
174 mov.w @r4+, r3 /* load (initial) first word */
175 bra .w_start_b
176 extu.b r2, r0 /* extend unsigned */
177
178 .align 2
179.w_loop_b: /* main loop: copy 2 words in a row */
180 mov.w @r4+, r3 /* load first word (2+ round) */
181 extu.b r2, r0 /* put away low byte of second word (2+ round) */
182 and r6, r2 /* get high byte of second word (2+ round) */
183 or r1, r2 /* combine with low byte of old first word */
184 mov.w r2, @r7 /* write that */
185.w_start_b:
186 cmp/hi r4, r5 /* check for end */
187 mov.w @r4+, r2 /* load second word */
188 extu.b r3, r1 /* put away low byte of first word */
189 and r6, r3 /* get high byte of first word */
190 or r0, r3 /* combine with high byte of old second word */
191 mov.w r3, @r7 /* write that */
192 bt .w_loop_b
193 /* 12 instructions for 2 copies, takes 14 clock cycles */
194 /* avg. 7 cycles per word */
195
196 /* the loop "overreads" 1 byte past the buffer end, however, the last */
197 /* byte is not written to disk */
198 and r6, r2 /* get high byte of last word */
199 or r1, r2 /* combine with low byte of old first word */
200 rts
201 mov.w r2, @r7 /* write last word */
202
203 /* 16-bit aligned, loop(load and write word) */
204.w_aligned:
205 bra .w_start_w /* jump into loop after next instr. */
206 mov.w @r4+, r2 /* load first word (1st round) */
207
208 .align 2
209.w_loop_w: /* main loop: copy 2 words in a row */
210 mov.w @r4+, r2 /* load first word (2+ round) */
211 swap.b r1, r0 /* swap second word (2+ round) */
212 mov.w r0, @r7 /* write second word (2+ round) */
213.w_start_w:
214 cmp/hi r4, r5 /* check for end */
215 mov.w @r4+, r1 /* load second word */
216 swap.b r2, r0 /* swap first word */
217 mov.w r0, @r7 /* write first word */
218 bt .w_loop_w
219 /* 8 instructions for 2 copies, takes 10 clock cycles */
220 /* avg. 5 cycles per word */
221
222 swap.b r1, r0 /* swap second word (last round) */
223 rts
224 mov.w r0, @r7 /* and write it */
225
226.w_end:
227 .size _copy_write_sectors,.w_end-_copy_write_sectors
228
229 .align 2
230.ata_data:
231 .long 0x06104100 /* ATA data port */
diff --git a/firmware/target/sh/archos/ata-target.h b/firmware/target/sh/archos/ata-target.h
new file mode 100755
index 0000000000..ddffb34f5a
--- /dev/null
+++ b/firmware/target/sh/archos/ata-target.h
@@ -0,0 +1,80 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19#ifndef ATA_TARGET_H
20#define ATA_TARGET_H
21
22/* asm optimised read & write loops */
23#define ATA_OPTIMIZED_READING
24#define ATA_OPTIMIZED_WRITING
25#define ATA_ADDRESS_DETECT /* need address detection */
26
27#define SWAP_WORDS
28
29#define ATA_IOBASE 0x06100100
30#define ATA_DATA (*((volatile unsigned short*)0x06104100))
31#define ATA_CONTROL1 ((volatile unsigned char*)0x06200206)
32#define ATA_CONTROL2 ((volatile unsigned char*)0x06200306)
33#define ATA_CONTROL (*ata_control)
34
35#define ATA_ERROR (*((volatile unsigned char*)ATA_IOBASE + 1))
36#define ATA_NSECTOR (*((volatile unsigned char*)ATA_IOBASE + 2))
37#define ATA_SECTOR (*((volatile unsigned char*)ATA_IOBASE + 3))
38#define ATA_LCYL (*((volatile unsigned char*)ATA_IOBASE + 4))
39#define ATA_HCYL (*((volatile unsigned char*)ATA_IOBASE + 5))
40#define ATA_SELECT (*((volatile unsigned char*)ATA_IOBASE + 6))
41#define ATA_COMMAND (*((volatile unsigned char*)ATA_IOBASE + 7))
42
43#define STATUS_BSY 0x80
44#define STATUS_RDY 0x40
45#define STATUS_DF 0x20
46#define STATUS_DRQ 0x08
47#define STATUS_ERR 0x01
48
49#define ERROR_ABRT 0x04
50
51#define WRITE_PATTERN1 0xa5
52#define WRITE_PATTERN2 0x5a
53#define WRITE_PATTERN3 0xaa
54#define WRITE_PATTERN4 0x55
55
56#define READ_PATTERN1 0xa5
57#define READ_PATTERN2 0x5a
58#define READ_PATTERN3 0xaa
59#define READ_PATTERN4 0x55
60
61#define READ_PATTERN1_MASK 0xff
62#define READ_PATTERN2_MASK 0xff
63#define READ_PATTERN3_MASK 0xff
64#define READ_PATTERN4_MASK 0xff
65
66#define SET_REG(reg,val) reg = (val)
67#define SET_16BITREG(reg,val) reg = (val)
68
69extern volatile unsigned char* ata_control;
70extern int ata_io_address;
71
72void ata_reset(void);
73void ata_address_detect(void);
74void ata_enable(bool on);
75void ata_device_init(void);
76bool ata_is_coldstart(void);
77
78void copy_read_sectors(unsigned char* buf, int wordcount);
79void copy_write_sectors(const unsigned char* buf, int wordcount);
80#endif
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