diff options
Diffstat (limited to 'firmware/target/mips')
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/system-target.h | 24 | ||||
-rw-r--r-- | firmware/target/mips/thread-mips32.c | 133 |
2 files changed, 24 insertions, 133 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/system-target.h b/firmware/target/mips/ingenic_jz47xx/system-target.h index caf1733158..1c2e7d7173 100644 --- a/firmware/target/mips/ingenic_jz47xx/system-target.h +++ b/firmware/target/mips/ingenic_jz47xx/system-target.h | |||
@@ -97,4 +97,28 @@ void dma_disable(void); | |||
97 | #define DMA_IRQ(n) (IRQ_DMA_0 + (n)) | 97 | #define DMA_IRQ(n) (IRQ_DMA_0 + (n)) |
98 | #define GPIO_IRQ(n) (IRQ_GPIO_0 + (n)) | 98 | #define GPIO_IRQ(n) (IRQ_GPIO_0 + (n)) |
99 | 99 | ||
100 | /*--------------------------------------------------------------------------- | ||
101 | * Put core in a power-saving state. | ||
102 | *--------------------------------------------------------------------------- | ||
103 | */ | ||
104 | static inline void core_sleep(void) | ||
105 | { | ||
106 | #if CONFIG_CPU == JZ4732 | ||
107 | __cpm_idle_mode(); | ||
108 | #endif | ||
109 | asm volatile(".set mips32r2 \n" | ||
110 | "mfc0 $8, $12 \n" /* mfc t0, $12 */ | ||
111 | "move $9, $8 \n" /* move t1, t0 */ | ||
112 | "la $10, 0x8000000 \n" /* la t2, 0x8000000 */ | ||
113 | "or $8, $8, $10 \n" /* Enable reduced power mode */ | ||
114 | "mtc0 $8, $12 \n" /* mtc t0, $12 */ | ||
115 | "wait \n" | ||
116 | "mtc0 $9, $12 \n" /* mtc t1, $12 */ | ||
117 | ".set mips0 \n" | ||
118 | ::: "t0", "t1", "t2" | ||
119 | ); | ||
120 | enable_irq(); | ||
121 | } | ||
122 | |||
123 | |||
100 | #endif /* __SYSTEM_TARGET_H_ */ | 124 | #endif /* __SYSTEM_TARGET_H_ */ |
diff --git a/firmware/target/mips/thread-mips32.c b/firmware/target/mips/thread-mips32.c deleted file mode 100644 index ba90c8965b..0000000000 --- a/firmware/target/mips/thread-mips32.c +++ /dev/null | |||
@@ -1,133 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2008 by Maurus Cuelenaere | ||
11 | * | ||
12 | * 32-bit MIPS threading support | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or | ||
15 | * modify it under the terms of the GNU General Public License | ||
16 | * as published by the Free Software Foundation; either version 2 | ||
17 | * of the License, or (at your option) any later version. | ||
18 | * | ||
19 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
20 | * KIND, either express or implied. | ||
21 | * | ||
22 | ****************************************************************************/ | ||
23 | |||
24 | /*--------------------------------------------------------------------------- | ||
25 | * Start the thread running and terminate it if it returns | ||
26 | *--------------------------------------------------------------------------- | ||
27 | */ | ||
28 | |||
29 | void start_thread(void); /* Provide C access to ASM label */ | ||
30 | static void USED_ATTR _start_thread(void) | ||
31 | { | ||
32 | /* t1 = context */ | ||
33 | asm volatile ( | ||
34 | "start_thread: \n" | ||
35 | ".set noreorder \n" | ||
36 | ".set noat \n" | ||
37 | "lw $8, 4($9) \n" /* Fetch thread function pointer ($8 = t0, $9 = t1) */ | ||
38 | "lw $29, 36($9) \n" /* Set initial sp(=$29) */ | ||
39 | "jalr $8 \n" /* Start the thread */ | ||
40 | "sw $0, 44($9) \n" /* Clear start address */ | ||
41 | ".set at \n" | ||
42 | ".set reorder \n" | ||
43 | ); | ||
44 | thread_exit(); | ||
45 | } | ||
46 | |||
47 | /* Place context pointer in s0 slot, function pointer in s1 slot, and | ||
48 | * start_thread pointer in context_start */ | ||
49 | #define THREAD_STARTUP_INIT(core, thread, function) \ | ||
50 | ({ (thread)->context.r[0] = (uint32_t)&(thread)->context, \ | ||
51 | (thread)->context.r[1] = (uint32_t)(function), \ | ||
52 | (thread)->context.start = (uint32_t)start_thread; }) | ||
53 | |||
54 | /*--------------------------------------------------------------------------- | ||
55 | * Store non-volatile context. | ||
56 | *--------------------------------------------------------------------------- | ||
57 | */ | ||
58 | static inline void store_context(void* addr) | ||
59 | { | ||
60 | asm volatile ( | ||
61 | ".set noreorder \n" | ||
62 | ".set noat \n" | ||
63 | "sw $16, 0(%0) \n" /* s0 */ | ||
64 | "sw $17, 4(%0) \n" /* s1 */ | ||
65 | "sw $18, 8(%0) \n" /* s2 */ | ||
66 | "sw $19, 12(%0) \n" /* s3 */ | ||
67 | "sw $20, 16(%0) \n" /* s4 */ | ||
68 | "sw $21, 20(%0) \n" /* s5 */ | ||
69 | "sw $22, 24(%0) \n" /* s6 */ | ||
70 | "sw $23, 28(%0) \n" /* s7 */ | ||
71 | "sw $30, 32(%0) \n" /* fp */ | ||
72 | "sw $29, 36(%0) \n" /* sp */ | ||
73 | "sw $31, 40(%0) \n" /* ra */ | ||
74 | ".set at \n" | ||
75 | ".set reorder \n" | ||
76 | : : "r" (addr) | ||
77 | ); | ||
78 | } | ||
79 | |||
80 | /*--------------------------------------------------------------------------- | ||
81 | * Load non-volatile context. | ||
82 | *--------------------------------------------------------------------------- | ||
83 | */ | ||
84 | static inline void load_context(const void* addr) | ||
85 | { | ||
86 | asm volatile ( | ||
87 | ".set noat \n" | ||
88 | ".set noreorder \n" | ||
89 | "lw $8, 44(%0) \n" /* Get start address ($8 = t0) */ | ||
90 | "beqz $8, running \n" /* NULL -> already running */ | ||
91 | "nop \n" | ||
92 | "jr $8 \n" | ||
93 | "move $9, %0 \n" /* t1 = context */ | ||
94 | "running: \n" | ||
95 | "lw $16, 0(%0) \n" /* s0 */ | ||
96 | "lw $17, 4(%0) \n" /* s1 */ | ||
97 | "lw $18, 8(%0) \n" /* s2 */ | ||
98 | "lw $19, 12(%0) \n" /* s3 */ | ||
99 | "lw $20, 16(%0) \n" /* s4 */ | ||
100 | "lw $21, 20(%0) \n" /* s5 */ | ||
101 | "lw $22, 24(%0) \n" /* s6 */ | ||
102 | "lw $23, 28(%0) \n" /* s7 */ | ||
103 | "lw $30, 32(%0) \n" /* fp */ | ||
104 | "lw $29, 36(%0) \n" /* sp */ | ||
105 | "lw $31, 40(%0) \n" /* ra */ | ||
106 | ".set at \n" | ||
107 | ".set reorder \n" | ||
108 | : : "r" (addr) : "t0", "t1" | ||
109 | ); | ||
110 | } | ||
111 | |||
112 | /*--------------------------------------------------------------------------- | ||
113 | * Put core in a power-saving state. | ||
114 | *--------------------------------------------------------------------------- | ||
115 | */ | ||
116 | static inline void core_sleep(void) | ||
117 | { | ||
118 | #if CONFIG_CPU == JZ4732 | ||
119 | __cpm_idle_mode(); | ||
120 | #endif | ||
121 | asm volatile(".set mips32r2 \n" | ||
122 | "mfc0 $8, $12 \n" /* mfc t0, $12 */ | ||
123 | "move $9, $8 \n" /* move t1, t0 */ | ||
124 | "la $10, 0x8000000 \n" /* la t2, 0x8000000 */ | ||
125 | "or $8, $8, $10 \n" /* Enable reduced power mode */ | ||
126 | "mtc0 $8, $12 \n" /* mtc t0, $12 */ | ||
127 | "wait \n" | ||
128 | "mtc0 $9, $12 \n" /* mtc t1, $12 */ | ||
129 | ".set mips0 \n" | ||
130 | ::: "t0", "t1", "t2" | ||
131 | ); | ||
132 | enable_irq(); | ||
133 | } | ||