summaryrefslogtreecommitdiff
path: root/firmware/target/mips
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/target/mips')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/app.lds8
-rw-r--r--firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c24
-rw-r--r--firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c26
-rw-r--r--firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c30
-rw-r--r--firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c17
-rw-r--r--firmware/target/mips/ingenic_jz47xx/crt0.S2
-rw-r--r--firmware/target/mips/ingenic_x1000/crt0.S7
-rw-r--r--firmware/target/mips/ingenic_x1000/erosqnative/audiohw-erosqnative.c40
-rw-r--r--firmware/target/mips/ingenic_x1000/erosqnative/button-erosqnative.c26
-rw-r--r--firmware/target/mips/ingenic_x1000/erosqnative/lcd-erosqnative.c146
-rw-r--r--firmware/target/mips/ingenic_x1000/msc-x1000.c2
-rw-r--r--firmware/target/mips/ingenic_x1000/sd-x1000.c14
-rw-r--r--firmware/target/mips/ingenic_x1000/system-x1000.c19
-rw-r--r--firmware/target/mips/ingenic_x1000/x1000boot.make2
14 files changed, 289 insertions, 74 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/app.lds b/firmware/target/mips/ingenic_jz47xx/app.lds
index 1d300fed82..29a973a0ca 100644
--- a/firmware/target/mips/ingenic_jz47xx/app.lds
+++ b/firmware/target/mips/ingenic_jz47xx/app.lds
@@ -37,15 +37,11 @@ SECTIONS
37{ 37{
38 . = DRAMORIG; 38 . = DRAMORIG;
39 39
40 .startup : 40 .text :
41 { 41 {
42 loadaddress = .; 42 loadaddress = .;
43 _loadaddress = .; 43 _loadaddress = .;
44 *(.startup.text); 44 *(.init.text);
45 } > DRAM
46
47 .text :
48 {
49 *(.text*); 45 *(.text*);
50#ifndef HAVE_INIT_ATTR 46#ifndef HAVE_INIT_ATTR
51 *(.init*); 47 *(.init*);
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c
index 5f320f8e9b..77fd5c013b 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c
@@ -84,7 +84,7 @@ struct nand_param
84 * 84 *
85 */ 85 */
86 86
87static volatile unsigned long nand_address; 87static volatile sector_t nand_address;
88#define NAND_DATAPORT (nand_address) 88#define NAND_DATAPORT (nand_address)
89#define NAND_ADDRPORT (nand_address+0x10000) 89#define NAND_ADDRPORT (nand_address+0x10000)
90#define NAND_COMMPORT (nand_address+0x08000) 90#define NAND_COMMPORT (nand_address+0x08000)
@@ -111,7 +111,7 @@ static volatile unsigned long nand_address;
111static struct nand_info* chip_info = NULL; 111static struct nand_info* chip_info = NULL;
112static struct nand_info* banks[4]; 112static struct nand_info* banks[4];
113static unsigned int nr_banks = 1; 113static unsigned int nr_banks = 1;
114static unsigned long bank_size; 114static sector_t bank_size;
115static struct nand_param internal_param; 115static struct nand_param internal_param;
116static struct mutex nand_mtx; 116static struct mutex nand_mtx;
117#ifdef USE_DMA 117#ifdef USE_DMA
@@ -282,7 +282,7 @@ static void jz_rs_correct(unsigned char *dat, int idx, int mask)
282/* 282/*
283 * Read oob 283 * Read oob
284 */ 284 */
285static int jz_nand_read_oob(unsigned long page_addr, unsigned char *buf, int size) 285static int jz_nand_read_oob(sector_t page_addr, unsigned char *buf, int size)
286{ 286{
287 struct nand_param *nandp = &internal_param; 287 struct nand_param *nandp = &internal_param;
288 int page_size, row_cycle, bus_width; 288 int page_size, row_cycle, bus_width;
@@ -338,7 +338,7 @@ static int jz_nand_read_oob(unsigned long page_addr, unsigned char *buf, int siz
338 * page - page number within a block: 0, 1, 2, ... 338 * page - page number within a block: 0, 1, 2, ...
339 * dst - pointer to target buffer 339 * dst - pointer to target buffer
340 */ 340 */
341static int jz_nand_read_page(unsigned long page_addr, unsigned char *dst) 341static int jz_nand_read_page(sector_t page_addr, unsigned char *dst)
342{ 342{
343 struct nand_param *nandp = &internal_param; 343 struct nand_param *nandp = &internal_param;
344 int page_size, oob_size; 344 int page_size, oob_size;
@@ -611,7 +611,7 @@ int nand_init(void)
611 return res; 611 return res;
612} 612}
613 613
614static inline int read_sector(unsigned long start, unsigned int count, 614static inline int read_sector(sector_t start, unsigned int count,
615 void* buf, unsigned int chip_size) 615 void* buf, unsigned int chip_size)
616{ 616{
617 register int ret; 617 register int ret;
@@ -627,14 +627,14 @@ static inline int read_sector(unsigned long start, unsigned int count,
627 return ret; 627 return ret;
628} 628}
629 629
630int nand_read_sectors(IF_MV(int drive,) unsigned long start, int count, void* buf) 630int nand_read_sectors(IF_MD(int drive,) sector_t start, int count, void* buf)
631{ 631{
632#ifdef HAVE_MULTIVOLUME 632#ifdef HAVE_MULTIDRIVE
633 (void)drive; 633 (void)drive;
634#endif 634#endif
635 int ret = 0; 635 int ret = 0;
636 unsigned int i, _count, chip_size = chip_info->page_size; 636 unsigned int i, _count, chip_size = chip_info->page_size;
637 unsigned long _start; 637 sector_t _start;
638 638
639 logf("start"); 639 logf("start");
640 mutex_lock(&nand_mtx); 640 mutex_lock(&nand_mtx);
@@ -670,12 +670,12 @@ int nand_read_sectors(IF_MV(int drive,) unsigned long start, int count, void* bu
670} 670}
671 671
672/* TODO */ 672/* TODO */
673int nand_write_sectors(IF_MV(int drive,) unsigned long start, int count, const void* buf) 673int nand_write_sectors(IF_MD(int drive,) sector_t start, int count, const void* buf)
674{ 674{
675 (void)start; 675 (void)start;
676 (void)count; 676 (void)count;
677 (void)buf; 677 (void)buf;
678#ifdef HAVE_MULTIVOLUME 678#ifdef HAVE_MULTIDRIVE
679 (void)drive; 679 (void)drive;
680#endif 680#endif
681 681
@@ -727,9 +727,9 @@ void nand_sleepnow(void)
727} 727}
728 728
729#ifdef STORAGE_GET_INFO 729#ifdef STORAGE_GET_INFO
730void nand_get_info(IF_MV(int drive,) struct storage_info *info) 730void nand_get_info(IF_MD(int drive,) struct storage_info *info)
731{ 731{
732#ifdef HAVE_MULTIVOLUME 732#ifdef HAVE_MULTIDRIVE
733 (void)drive; 733 (void)drive;
734#endif 734#endif
735 735
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c
index efce5742d0..ff9b7e419e 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c
@@ -110,7 +110,7 @@ struct nand_param {
110 110
111static struct nand_info* chip_info = NULL; 111static struct nand_info* chip_info = NULL;
112static struct nand_info* bank; 112static struct nand_info* bank;
113static unsigned long nand_size; 113static sector_t nand_size;
114static struct nand_param internal_param; 114static struct nand_param internal_param;
115static struct mutex nand_mtx; 115static struct mutex nand_mtx;
116#ifdef USE_DMA 116#ifdef USE_DMA
@@ -281,7 +281,7 @@ static void jz_rs_correct(unsigned char *dat, int idx, int mask)
281/* 281/*
282 * Read oob 282 * Read oob
283 */ 283 */
284static int jz_nand_read_oob(unsigned long page_addr, unsigned char *buf, int size) 284static int jz_nand_read_oob(sector_t page_addr, unsigned char *buf, int size)
285{ 285{
286 struct nand_param *nandp = &internal_param; 286 struct nand_param *nandp = &internal_param;
287 int page_size, row_cycle, bus_width; 287 int page_size, row_cycle, bus_width;
@@ -337,7 +337,7 @@ static int jz_nand_read_oob(unsigned long page_addr, unsigned char *buf, int siz
337 * page - page number within a block: 0, 1, 2, ... 337 * page - page number within a block: 0, 1, 2, ...
338 * dst - pointer to target buffer 338 * dst - pointer to target buffer
339 */ 339 */
340static int jz_nand_read_page(unsigned long page_addr, unsigned char *dst) 340static int jz_nand_read_page(sector_t page_addr, unsigned char *dst)
341{ 341{
342 struct nand_param *nandp = &internal_param; 342 struct nand_param *nandp = &internal_param;
343 int page_size, oob_size; 343 int page_size, oob_size;
@@ -532,7 +532,7 @@ int nand_init(void)
532 return res; 532 return res;
533} 533}
534 534
535static inline int read_sector(unsigned long start, unsigned int count, 535static inline int read_sector(sector_t start, unsigned int count,
536 void* buf, unsigned int chip_size) 536 void* buf, unsigned int chip_size)
537{ 537{
538 register int ret; 538 register int ret;
@@ -548,7 +548,7 @@ static inline int read_sector(unsigned long start, unsigned int count,
548 return ret; 548 return ret;
549} 549}
550 550
551static inline int write_sector(unsigned long start, unsigned int count, 551static inline int write_sector(sector_t start, unsigned int count,
552 const void* buf, unsigned int chip_size) 552 const void* buf, unsigned int chip_size)
553{ 553{
554 int ret = 0; 554 int ret = 0;
@@ -563,14 +563,14 @@ static inline int write_sector(unsigned long start, unsigned int count,
563 return ret; 563 return ret;
564} 564}
565 565
566int nand_read_sectors(IF_MV(int drive,) unsigned long start, int count, void* buf) 566int nand_read_sectors(IF_MD(int drive,) sector_t start, int count, void* buf)
567{ 567{
568#ifdef HAVE_MULTIVOLUME 568#ifdef HAVE_MULTIDRIVE
569 (void)drive; 569 (void)drive;
570#endif 570#endif
571 int ret = 0; 571 int ret = 0;
572 unsigned int _count, chip_size = chip_info->page_size; 572 unsigned int _count, chip_size = chip_info->page_size;
573 unsigned long _start; 573 sector_t _start;
574 574
575 logf("start"); 575 logf("start");
576 mutex_lock(&nand_mtx); 576 mutex_lock(&nand_mtx);
@@ -590,14 +590,14 @@ int nand_read_sectors(IF_MV(int drive,) unsigned long start, int count, void* bu
590 return ret; 590 return ret;
591} 591}
592 592
593int nand_write_sectors(IF_MV(int drive,) unsigned long start, int count, const void* buf) 593int nand_write_sectors(IF_MD(int drive,) sector_t start, int count, const void* buf)
594{ 594{
595#ifdef HAVE_MULTIVOLUME 595#ifdef HAVE_MULTIDRIVE
596 (void)drive; 596 (void)drive;
597#endif 597#endif
598 int ret = 0; 598 int ret = 0;
599 unsigned int _count, chip_size = chip_info->page_size; 599 unsigned int _count, chip_size = chip_info->page_size;
600 unsigned long _start; 600 sector_t _start;
601 601
602 logf("start"); 602 logf("start");
603 mutex_lock(&nand_mtx); 603 mutex_lock(&nand_mtx);
@@ -662,9 +662,9 @@ void nand_sleepnow(void)
662} 662}
663 663
664#ifdef STORAGE_GET_INFO 664#ifdef STORAGE_GET_INFO
665void nand_get_info(IF_MV(int drive,) struct storage_info *info) 665void nand_get_info(IF_MD(int drive,) struct storage_info *info)
666{ 666{
667#ifdef HAVE_MULTIVOLUME 667#ifdef HAVE_MULTIDRIVE
668 (void)drive; 668 (void)drive;
669#endif 669#endif
670 670
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c
index 56dd50814a..066be4e987 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c
@@ -42,7 +42,6 @@ static struct mutex sd_mtx;
42 42
43static int use_4bit; 43static int use_4bit;
44static int num_6; 44static int num_6;
45static int sd2_0;
46 45
47//#define SD_DMA_ENABLE 46//#define SD_DMA_ENABLE
48#define SD_DMA_INTERRUPT 0 47#define SD_DMA_INTERRUPT 0
@@ -598,7 +597,7 @@ static int jz_sd_transmit_data(struct sd_request *req)
598static inline unsigned int jz_sd_calc_clkrt(unsigned int rate) 597static inline unsigned int jz_sd_calc_clkrt(unsigned int rate)
599{ 598{
600 unsigned int clkrt; 599 unsigned int clkrt;
601 unsigned int clk_src = sd2_0 ? SD_CLOCK_HIGH : SD_CLOCK_FAST; 600 unsigned int clk_src = card.sd2plus ? SD_CLOCK_HIGH : SD_CLOCK_FAST;
602 601
603 clkrt = 0; 602 clkrt = 0;
604 while (rate < clk_src) 603 while (rate < clk_src)
@@ -716,7 +715,7 @@ static int jz_sd_exec_cmd(struct sd_request *request)
716 events = SD_EVENT_RX_DATA_DONE; 715 events = SD_EVENT_RX_DATA_DONE;
717 break; 716 break;
718 717
719 case 6: 718 case SD_SWITCH_FUNC:
720 if (num_6 < 2) 719 if (num_6 < 2)
721 { 720 {
722#if defined(SD_DMA_ENABLE) 721#if defined(SD_DMA_ENABLE)
@@ -1086,7 +1085,6 @@ static int sd_init_card_state(struct sd_request *request)
1086 (request->response[3+i*4]<< 8) | request->response[4+i*4]); 1085 (request->response[3+i*4]<< 8) | request->response[4+i*4]);
1087 1086
1088 sd_parse_csd(&card); 1087 sd_parse_csd(&card);
1089 sd2_0 = (card_extract_bits(card.csd, 127, 2) == 1);
1090 1088
1091 logf("CSD: %08lx%08lx%08lx%08lx", card.csd[0], card.csd[1], card.csd[2], card.csd[3]); 1089 logf("CSD: %08lx%08lx%08lx%08lx", card.csd[0], card.csd[1], card.csd[2], card.csd[3]);
1092 DEBUG("SD card is ready"); 1090 DEBUG("SD card is ready");
@@ -1155,7 +1153,7 @@ static int sd_select_card(void)
1155 if (retval) 1153 if (retval)
1156 return retval; 1154 return retval;
1157 1155
1158 if (sd2_0) 1156 if (card.sd2plus)
1159 { 1157 {
1160 retval = sd_read_switch(&request); 1158 retval = sd_read_switch(&request);
1161 if (!retval) 1159 if (!retval)
@@ -1188,7 +1186,6 @@ static int __sd_init_device(void)
1188 /* Initialise card data as blank */ 1186 /* Initialise card data as blank */
1189 memset(&card, 0, sizeof(tCardInfo)); 1187 memset(&card, 0, sizeof(tCardInfo));
1190 1188
1191 sd2_0 = 0;
1192 num_6 = 0; 1189 num_6 = 0;
1193 use_4bit = 0; 1190 use_4bit = 0;
1194 1191
@@ -1250,9 +1247,9 @@ static inline void sd_stop_transfer(void)
1250 mutex_unlock(&sd_mtx); 1247 mutex_unlock(&sd_mtx);
1251} 1248}
1252 1249
1253int sd_read_sectors(IF_MD(int drive,) unsigned long start, int count, void* buf) 1250int sd_read_sectors(IF_MD(int drive,) sector_t start, int count, void* buf)
1254{ 1251{
1255#ifdef HAVE_MULTIVOLUME 1252#ifdef HAVE_MULTIDRIVE
1256 (void)drive; 1253 (void)drive;
1257#endif 1254#endif
1258 sd_start_transfer(); 1255 sd_start_transfer();
@@ -1276,7 +1273,8 @@ int sd_read_sectors(IF_MD(int drive,) unsigned long start, int count, void* buf)
1276 if ((retval = sd_unpack_r1(&request, &r1))) 1273 if ((retval = sd_unpack_r1(&request, &r1)))
1277 goto err; 1274 goto err;
1278 1275
1279 if (sd2_0) 1276 // XXX 64-bit
1277 if (card.sd2plus)
1280 { 1278 {
1281 sd_send_cmd(&request, SD_READ_MULTIPLE_BLOCK, start, 1279 sd_send_cmd(&request, SD_READ_MULTIPLE_BLOCK, start,
1282 count, SD_BLOCK_SIZE, RESPONSE_R1, buf); 1280 count, SD_BLOCK_SIZE, RESPONSE_R1, buf);
@@ -1292,21 +1290,20 @@ int sd_read_sectors(IF_MD(int drive,) unsigned long start, int count, void* buf)
1292 goto err; 1290 goto err;
1293 } 1291 }
1294 1292
1295 last_disk_activity = current_tick;
1296
1297 sd_simple_cmd(&request, SD_STOP_TRANSMISSION, 0, RESPONSE_R1B); 1293 sd_simple_cmd(&request, SD_STOP_TRANSMISSION, 0, RESPONSE_R1B);
1298 if ((retval = sd_unpack_r1(&request, &r1))) 1294 if ((retval = sd_unpack_r1(&request, &r1)))
1299 goto err; 1295 goto err;
1300 1296
1301err: 1297err:
1298 last_disk_activity = current_tick;
1302 sd_stop_transfer(); 1299 sd_stop_transfer();
1303 1300
1304 return retval; 1301 return retval;
1305} 1302}
1306 1303
1307int sd_write_sectors(IF_MV(int drive,) unsigned long start, int count, const void* buf) 1304int sd_write_sectors(IF_MD(int drive,) sector_t start, int count, const void* buf)
1308{ 1305{
1309#ifdef HAVE_MULTIVOLUME 1306#ifdef HAVE_MULTIDRIVE
1310 (void)drive; 1307 (void)drive;
1311#endif 1308#endif
1312 sd_start_transfer(); 1309 sd_start_transfer();
@@ -1330,7 +1327,8 @@ int sd_write_sectors(IF_MV(int drive,) unsigned long start, int count, const voi
1330 if ((retval = sd_unpack_r1(&request, &r1))) 1327 if ((retval = sd_unpack_r1(&request, &r1)))
1331 goto err; 1328 goto err;
1332 1329
1333 if (sd2_0) 1330 // XXX 64-bit
1331 if (card.sd2plus)
1334 { 1332 {
1335 sd_send_cmd(&request, SD_WRITE_MULTIPLE_BLOCK, start, 1333 sd_send_cmd(&request, SD_WRITE_MULTIPLE_BLOCK, start,
1336 count, SD_BLOCK_SIZE, RESPONSE_R1, 1334 count, SD_BLOCK_SIZE, RESPONSE_R1,
@@ -1387,7 +1385,7 @@ int sd_soft_reset(void)
1387#ifdef HAVE_HOTSWAP 1385#ifdef HAVE_HOTSWAP
1388bool sd_removable(IF_MD_NONVOID(int drive)) 1386bool sd_removable(IF_MD_NONVOID(int drive))
1389{ 1387{
1390#ifdef HAVE_MULTIVOLUME 1388#ifdef HAVE_MULTIDRIVE
1391 (void)drive; 1389 (void)drive;
1392#endif 1390#endif
1393 return true; 1391 return true;
@@ -1415,7 +1413,7 @@ void MMC_CD_IRQ(void)
1415} 1413}
1416#endif 1414#endif
1417 1415
1418bool sd_present(IF_MV_NONVOID(int drive)) 1416bool sd_present(IF_MD_NONVOID(int drive))
1419{ 1417{
1420#ifdef HAVE_MULTIDRIVE 1418#ifdef HAVE_MULTIDRIVE
1421 (void)drive; 1419 (void)drive;
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
index 1960fcbd35..3810852686 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
@@ -57,8 +57,6 @@ static struct semaphore sd_wakeup[NUM_DRIVES];
57 57
58static int use_4bit[NUM_DRIVES]; 58static int use_4bit[NUM_DRIVES];
59static int num_6[NUM_DRIVES]; 59static int num_6[NUM_DRIVES];
60static int sd2_0[NUM_DRIVES];
61
62 60
63//#define DEBUG(x...) logf(x) 61//#define DEBUG(x...) logf(x)
64#define DEBUG(x, ...) 62#define DEBUG(x, ...)
@@ -698,7 +696,7 @@ static inline unsigned int jz_sd_calc_clkrt(const int drive, unsigned int rate)
698 unsigned int clkrt = 0; 696 unsigned int clkrt = 0;
699 unsigned int clk_src = cpu_frequency / __cpm_get_mscdiv(); /* MSC_CLK */ 697 unsigned int clk_src = cpu_frequency / __cpm_get_mscdiv(); /* MSC_CLK */
700 698
701 if (!sd2_0[drive] && rate > SD_CLOCK_FAST) 699 if (!card[drive].sd2plus && rate > SD_CLOCK_FAST)
702 rate = SD_CLOCK_FAST; 700 rate = SD_CLOCK_FAST;
703 701
704 while (rate < clk_src) 702 while (rate < clk_src)
@@ -1192,7 +1190,6 @@ static int sd_init_card_state(const int drive, struct sd_request *request)
1192 (request->response[3+i*4]<< 8) | request->response[4+i*4]); 1190 (request->response[3+i*4]<< 8) | request->response[4+i*4]);
1193 1191
1194 sd_parse_csd(&card[drive]); 1192 sd_parse_csd(&card[drive]);
1195 sd2_0[drive] = (card_extract_bits(card[drive].csd, 127, 2) == 1);
1196 1193
1197 logf("CSD: %08lx%08lx%08lx%08lx", card[drive].csd[0], card[drive].csd[1], card[drive].csd[2], card[drive].csd[3]); 1194 logf("CSD: %08lx%08lx%08lx%08lx", card[drive].csd[0], card[drive].csd[1], card[drive].csd[2], card[drive].csd[3]);
1198 DEBUG("SD card is ready"); 1195 DEBUG("SD card is ready");
@@ -1261,7 +1258,7 @@ static int sd_select_card(const int drive)
1261 if (retval) 1258 if (retval)
1262 return retval; 1259 return retval;
1263 1260
1264 if (sd2_0[drive]) 1261 if (card[drive].sd2plus)
1265 { 1262 {
1266 retval = sd_read_switch(drive, &request); 1263 retval = sd_read_switch(drive, &request);
1267 if (!retval) 1264 if (!retval)
@@ -1292,7 +1289,6 @@ static int __sd_init_device(const int drive)
1292 /* Initialise card data as blank */ 1289 /* Initialise card data as blank */
1293 memset(&card[drive], 0, sizeof(tCardInfo)); 1290 memset(&card[drive], 0, sizeof(tCardInfo));
1294 1291
1295 sd2_0[drive] = 0;
1296 num_6[drive] = 0; 1292 num_6[drive] = 0;
1297 use_4bit[drive] = 0; 1293 use_4bit[drive] = 0;
1298 active[drive] = 0; 1294 active[drive] = 0;
@@ -1402,7 +1398,7 @@ static inline void sd_stop_transfer(const int drive)
1402 mutex_unlock(&sd_mtx[drive]); 1398 mutex_unlock(&sd_mtx[drive]);
1403} 1399}
1404 1400
1405int sd_transfer_sectors(IF_MD(const int drive,) unsigned long start, int count, void* buf, bool write) 1401int sd_transfer_sectors(IF_MD(const int drive,) sector_t start, int count, void* buf, bool write)
1406{ 1402{
1407 struct sd_request request; 1403 struct sd_request request;
1408 struct sd_response_r1 r1; 1404 struct sd_response_r1 r1;
@@ -1427,11 +1423,12 @@ int sd_transfer_sectors(IF_MD(const int drive,) unsigned long start, int count,
1427 if ((retval = sd_unpack_r1(&request, &r1))) 1423 if ((retval = sd_unpack_r1(&request, &r1)))
1428 goto err; 1424 goto err;
1429 1425
1426 // XXX 64-bit
1430 sd_send_cmd(drive, &request, 1427 sd_send_cmd(drive, &request,
1431 (count > 1) ? 1428 (count > 1) ?
1432 (write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK) : 1429 (write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK) :
1433 (write ? SD_WRITE_BLOCK : SD_READ_SINGLE_BLOCK), 1430 (write ? SD_WRITE_BLOCK : SD_READ_SINGLE_BLOCK),
1434 sd2_0[drive] ? start : (start * SD_BLOCK_SIZE), 1431 card[drive].sd2plus ? start : (start * SD_BLOCK_SIZE),
1435 count, SD_BLOCK_SIZE, RESPONSE_R1, buf); 1432 count, SD_BLOCK_SIZE, RESPONSE_R1, buf);
1436 if ((retval = sd_unpack_r1(&request, &r1))) 1433 if ((retval = sd_unpack_r1(&request, &r1)))
1437 goto err; 1434 goto err;
@@ -1451,12 +1448,12 @@ err:
1451 return retval; 1448 return retval;
1452} 1449}
1453 1450
1454int sd_read_sectors(IF_MD(int drive,) unsigned long start, int count, void* buf) 1451int sd_read_sectors(IF_MD(int drive,) sector_t start, int count, void* buf)
1455{ 1452{
1456 return sd_transfer_sectors(IF_MD(drive,) start, count, buf, false); 1453 return sd_transfer_sectors(IF_MD(drive,) start, count, buf, false);
1457} 1454}
1458 1455
1459int sd_write_sectors(IF_MD(int drive,) unsigned long start, int count, const void* buf) 1456int sd_write_sectors(IF_MD(int drive,) sector_t start, int count, const void* buf)
1460{ 1457{
1461 return sd_transfer_sectors(IF_MD(drive,) start, count, (void*)buf, true); 1458 return sd_transfer_sectors(IF_MD(drive,) start, count, (void*)buf, true);
1462} 1459}
diff --git a/firmware/target/mips/ingenic_jz47xx/crt0.S b/firmware/target/mips/ingenic_jz47xx/crt0.S
index b73a43d8f2..ee203b3b4d 100644
--- a/firmware/target/mips/ingenic_jz47xx/crt0.S
+++ b/firmware/target/mips/ingenic_jz47xx/crt0.S
@@ -44,7 +44,7 @@
44 .extern main 44 .extern main
45 .global _start 45 .global _start
46 46
47 .section .startup.text,"ax",%progbits 47 .section .init.text
48 .set push 48 .set push
49 .set mips32 49 .set mips32
50 .set noreorder 50 .set noreorder
diff --git a/firmware/target/mips/ingenic_x1000/crt0.S b/firmware/target/mips/ingenic_x1000/crt0.S
index 6c0942b0db..23daaefb5e 100644
--- a/firmware/target/mips/ingenic_x1000/crt0.S
+++ b/firmware/target/mips/ingenic_x1000/crt0.S
@@ -23,6 +23,10 @@
23#include "mips.h" 23#include "mips.h"
24#include "bootdata.h" 24#include "bootdata.h"
25 25
26#if defined(HAVE_DEVICEDATA) && !defined(BOOTLOADER)
27#include "devicedata.h"
28#endif
29
26 .text 30 .text
27 .extern main 31 .extern main
28 .extern system_early_init 32 .extern system_early_init
@@ -52,6 +56,9 @@ _header:
52#ifndef BOOTLOADER 56#ifndef BOOTLOADER
53 /* Multiboot support header; this is not part of the above header. */ 57 /* Multiboot support header; this is not part of the above header. */
54 put_boot_data_here 58 put_boot_data_here
59#ifdef HAVE_DEVICEDATA
60 put_device_data_here
61#endif
55#endif 62#endif
56 63
57_realstart: 64_realstart:
diff --git a/firmware/target/mips/ingenic_x1000/erosqnative/audiohw-erosqnative.c b/firmware/target/mips/ingenic_x1000/erosqnative/audiohw-erosqnative.c
index df97aba0c8..6968a19a1c 100644
--- a/firmware/target/mips/ingenic_x1000/erosqnative/audiohw-erosqnative.c
+++ b/firmware/target/mips/ingenic_x1000/erosqnative/audiohw-erosqnative.c
@@ -104,6 +104,30 @@ void audiohw_postinit(void)
104 * for 24-bit data... */ 104 * for 24-bit data... */
105 // es9018k2m_write_reg(ES9018K2M_REG1_INPUT_CONFIG, 0b01001100); // 24-bit data 105 // es9018k2m_write_reg(ES9018K2M_REG1_INPUT_CONFIG, 0b01001100); // 24-bit data
106 106
107 /* Datasheet: Sets the number os FSR edges that must occur before *
108 * the DPLL and ASRC can lock on to the the incoming Signal. *
109 * When Samplerates >= 96khz could be used, STOP_DIV should be set *
110 * to 0 (= 16384 FSR Edges). *
111 * Reg #10 [3:0] (0x05 default, 2730 FSR Edges) */
112 es9018k2m_write_reg(ES9018K2M_REG10_MASTER_MODE_CTRL, 0x00);
113
114 /* Datasheet: The ES90x8Q2M/K2M contains a Jitter Eliminator block, *
115 * which employs the use of a digital phase locked loop (DPLL) to *
116 * lock to the incoming audio clock rate. When in I2S or SPDIF mode, *
117 * the DPLL will lock to the frame clock (1 x fs). However, when in *
118 * DSD mode, the DPLL has no frame clock information, and must in- *
119 * stead lock to the bit clock rate (BCK). For this reason, there are *
120 * two bandwidth settings for the DPLL. *
121 Reg #12 [7:4] (0x05 default) bandwidth for I2S / SPDIF mode.
122 Reg #12 [3:0] (0x0A default) bandwidth for DSD mode.
123 * The DPLL bandwidth sets how quickly the DPLL can adjust its intern *
124 * representation of the audio clock. The higher the jitter or *
125 * frequency drift on the audio clock, the higher the bandwidth must *
126 * be so that the DPLL can react. *
127 * ! If the bandwidth is “too low”, the DPLL will loose lock and you *
128 * ! will hear random dropouts. (Fixed my SurfansF20 v3.2 dropouts) */
129 es9018k2m_write_reg(ES9018K2M_REG12_DPLL_SETTINGS, 0xda);
130
107 } else { /* Default to SWVOL for PCM5102A DAC */ 131 } else { /* Default to SWVOL for PCM5102A DAC */
108 logf("Default to SWVOL: ret=%d", ret); 132 logf("Default to SWVOL: ret=%d", ret);
109 } 133 }
@@ -139,17 +163,19 @@ void audiohw_set_volume(int vol_l, int vol_r)
139 r = vol_r; 163 r = vol_r;
140 164
141#if (defined(HAVE_HEADPHONE_DETECTION) && defined(HAVE_LINEOUT_DETECTION)) 165#if (defined(HAVE_HEADPHONE_DETECTION) && defined(HAVE_LINEOUT_DETECTION))
142 /* make sure headphones aren't present - don't want to 166 /* Due to the hardware's detection method, make the Line-Out
143 * blow out our eardrums cranking it to full */ 167 * the default. The LO can only be detected if it is active
144 if (lineout_inserted() && !headphones_inserted()) 168 * (assuming a high-impedance device is attached). HP takes priority
169 * if both are present. */
170 if (headphones_inserted())
145 { 171 {
146 eros_qn_switch_output(1); 172 eros_qn_switch_output(0);
147
148 l = r = eros_qn_get_volume_limit();
149 } 173 }
150 else 174 else
151 { 175 {
152 eros_qn_switch_output(0); 176 eros_qn_switch_output(1);
177
178 l = r = eros_qn_get_volume_limit();
153 } 179 }
154#endif 180#endif
155 181
diff --git a/firmware/target/mips/ingenic_x1000/erosqnative/button-erosqnative.c b/firmware/target/mips/ingenic_x1000/erosqnative/button-erosqnative.c
index 0d2207af2a..707dc372a8 100644
--- a/firmware/target/mips/ingenic_x1000/erosqnative/button-erosqnative.c
+++ b/firmware/target/mips/ingenic_x1000/erosqnative/button-erosqnative.c
@@ -75,12 +75,26 @@ volatile signed int enc_position = 0;
75/* Value of headphone detect register */ 75/* Value of headphone detect register */
76static uint8_t hp_detect_reg = 0x00; 76static uint8_t hp_detect_reg = 0x00;
77static uint8_t hp_detect_reg_old = 0x00; 77static uint8_t hp_detect_reg_old = 0x00;
78static uint8_t hp_detect_debounce1 = 0x00;
79static uint8_t hp_detect_debounce2 = 0x00;
80static uint8_t debounce_count = 0;
78 81
79/* Interval to poll the register */ 82/* Interval to poll the register */
80#define HPD_POLL_TIME (HZ/2) 83#define HPD_POLL_TIME (HZ/4)
81 84
82static int hp_detect_tmo_cb(struct timeout* tmo) 85static int hp_detect_tmo_cb(struct timeout* tmo)
83{ 86{
87 if (hp_detect_debounce1 == hp_detect_debounce2){
88 if (debounce_count >= 2){
89 debounce_count = 2;
90 } else {
91 debounce_count = debounce_count + 1;
92 }
93 } else {
94 debounce_count = 0;
95 hp_detect_debounce2 = hp_detect_debounce1;
96 }
97
84 i2c_descriptor* d = (i2c_descriptor*)tmo->data; 98 i2c_descriptor* d = (i2c_descriptor*)tmo->data;
85 i2c_async_queue(AXP_PMU_BUS, TIMEOUT_NOBLOCK, I2C_Q_ADD, 0, d); 99 i2c_async_queue(AXP_PMU_BUS, TIMEOUT_NOBLOCK, I2C_Q_ADD, 0, d);
86 return HPD_POLL_TIME; 100 return HPD_POLL_TIME;
@@ -96,7 +110,7 @@ static void hp_detect_init(void)
96 .tran_mode = I2C_READ, 110 .tran_mode = I2C_READ,
97 .buffer[0] = (void*)&gpio_reg, 111 .buffer[0] = (void*)&gpio_reg,
98 .count[0] = 1, 112 .count[0] = 1,
99 .buffer[1] = &hp_detect_reg, 113 .buffer[1] = &hp_detect_debounce1,
100 .count[1] = 1, 114 .count[1] = 1,
101 .callback = NULL, 115 .callback = NULL,
102 .arg = 0, 116 .arg = 0,
@@ -113,6 +127,8 @@ static void hp_detect_init(void)
113 if(r >= 0) 127 if(r >= 0)
114 { 128 {
115 hp_detect_reg = r; 129 hp_detect_reg = r;
130 hp_detect_debounce1 = r;
131 hp_detect_debounce2 = r;
116 hp_detect_reg_old = hp_detect_reg; 132 hp_detect_reg_old = hp_detect_reg;
117 } 133 }
118 134
@@ -122,6 +138,9 @@ static void hp_detect_init(void)
122 138
123bool headphones_inserted(void) 139bool headphones_inserted(void)
124{ 140{
141 if (debounce_count > 1){
142 hp_detect_reg = hp_detect_debounce2;
143 }
125 /* if the status has changed, set the output volume accordingly */ 144 /* if the status has changed, set the output volume accordingly */
126 if ((hp_detect_reg & 0x30) != (hp_detect_reg_old & 0x30)) 145 if ((hp_detect_reg & 0x30) != (hp_detect_reg_old & 0x30))
127 { 146 {
@@ -135,6 +154,9 @@ bool headphones_inserted(void)
135 154
136bool lineout_inserted(void) 155bool lineout_inserted(void)
137{ 156{
157 if (debounce_count > 1){
158 hp_detect_reg = hp_detect_debounce2;
159 }
138 /* if the status has changed, set the output volume accordingly */ 160 /* if the status has changed, set the output volume accordingly */
139 if ((hp_detect_reg & 0x30) != (hp_detect_reg_old & 0x30)) 161 if ((hp_detect_reg & 0x30) != (hp_detect_reg_old & 0x30))
140 { 162 {
diff --git a/firmware/target/mips/ingenic_x1000/erosqnative/lcd-erosqnative.c b/firmware/target/mips/ingenic_x1000/erosqnative/lcd-erosqnative.c
index 0d43a3f010..bcc30a71bd 100644
--- a/firmware/target/mips/ingenic_x1000/erosqnative/lcd-erosqnative.c
+++ b/firmware/target/mips/ingenic_x1000/erosqnative/lcd-erosqnative.c
@@ -25,11 +25,138 @@
25#include "lcd-x1000.h" 25#include "lcd-x1000.h"
26#include "gpio-x1000.h" 26#include "gpio-x1000.h"
27#include "system.h" 27#include "system.h"
28#include "devicedata.h"
28 29
29/* for reference on these command/data hex values, see the mipi dcs lcd spec. * 30/* for reference on these command/data hex values, see the mipi dcs lcd spec. *
30 * Not everything here is there, but all the standard stuff is. */ 31 * Not everything here is there, but all the standard stuff is. */
31 32
32static const uint32_t erosqnative_lcd_cmd_enable[] = { 33/* New Display Eroq 2.1 / Hifiwalker 1.7+ / Surfans v3.2, unknown Controller *
34 * (partially GC9A01 register compatible) *
35 * https://espruino.microcosm.app/api/v1/files/ \ *
36 * 9dc1b976d621a2ab3854312cce862c4a9a50dc1b.html#GC9A01 , *
37 * https://www.buydisplay.com/download/ic/GC9A01A.pdf , *
38 * https://lcddisplay.co/wp-content/uploads/2023/02/GC9A01.pdf *
39 * Init sequence From 'EROS Q （c口）_V2.1_20231209固件.zip' *
40 * update.upt/.iso -> In 'uboot.bin' at 0x52da0-0x5305f *
41 * http://www.eroshifi.com/download/firmware/122.html */
42static const uint32_t erosqnative_lcd_cmd_enable_v3[] = {
43
44 /* Unlock EXTC? */
45 LCD_INSTR_CMD, 0xfe, // Inter Register Enable1
46 LCD_INSTR_CMD, 0xef, // Inter Register Enable2
47
48 LCD_INSTR_CMD, 0x36, // Memory Access Control
49/* Bit7 1:vertical flip 0:no vertical flip
50 Bit6 1:horizontal flip 0:no horizontal flip
51 Bit3 1:BGR 0:RGB */
52 LCD_INSTR_DAT, 0x90,
53 /* Pixel Format Set */
54 LCD_INSTR_CMD, 0x3a,
55 LCD_INSTR_DAT, 0x55, /* Rockbox uses 16pp, OF specified 18 bpp */
56
57 LCD_INSTR_CMD, 0x84, // ?? (undocumented)
58 LCD_INSTR_DAT, 0x04,
59 LCD_INSTR_CMD, 0x86, // ??
60 LCD_INSTR_DAT, 0xfb,
61 LCD_INSTR_CMD, 0x87, // ??
62 LCD_INSTR_DAT, 0x79,
63 LCD_INSTR_CMD, 0x89, // ??
64 LCD_INSTR_DAT, 0x0b,
65 LCD_INSTR_CMD, 0x8a, // ??
66 LCD_INSTR_DAT, 0x20,
67 LCD_INSTR_CMD, 0x8b, // ??
68 LCD_INSTR_DAT, 0x80,
69 LCD_INSTR_CMD, 0x8d, // ??
70 LCD_INSTR_DAT, 0x3b,
71 LCD_INSTR_CMD, 0x8e, // ??
72 LCD_INSTR_DAT, 0xcf,
73
74 LCD_INSTR_CMD, 0xec, // Charge Pump Frequent Control
75 LCD_INSTR_DAT, 0x33,
76 LCD_INSTR_DAT, 0x02,
77 LCD_INSTR_DAT, 0x4c,
78
79 LCD_INSTR_CMD, 0x98, // ?? (undocumented)
80 LCD_INSTR_DAT, 0x3e,
81 LCD_INSTR_CMD, 0x9c, // ??
82 LCD_INSTR_DAT, 0x4b,
83 LCD_INSTR_CMD, 0x99, // ??
84 LCD_INSTR_DAT, 0x3e,
85 LCD_INSTR_CMD, 0x9d, // ??
86 LCD_INSTR_DAT, 0x4b,
87 LCD_INSTR_CMD, 0x9b, // ??
88 LCD_INSTR_DAT, 0x55,
89
90 LCD_INSTR_CMD, 0xe8, // Frame Rate
91 LCD_INSTR_DAT, 0x11,
92 LCD_INSTR_DAT, 0x00,
93
94 LCD_INSTR_CMD, 0xff, // ?? (Adafruit & Co lib. C:0xFF, D:0x60, D:0x01, D:0x04)
95 LCD_INSTR_DAT, 0x62, // LCD_INSTR_DAT, 0x01, LCD_INSTR_DAT, 0x04,
96 LCD_INSTR_CMD, 0xc3, // Vreg1a voltage Control
97 LCD_INSTR_DAT, 0x20,
98 LCD_INSTR_CMD, 0xc4, // Vreg1b voltage Control
99 LCD_INSTR_DAT, 0x03,
100 LCD_INSTR_CMD, 0xc9, // Vreg2a voltage Control
101 LCD_INSTR_DAT, 0x2a,
102
103 LCD_INSTR_CMD, 0xf0, // SET_GAMMA1
104 LCD_INSTR_DAT, 0x4a,
105 LCD_INSTR_DAT, 0x10,
106 LCD_INSTR_DAT, 0x0a,
107 LCD_INSTR_DAT, 0x0a,
108 LCD_INSTR_DAT, 0x26,
109 LCD_INSTR_DAT, 0x39,
110
111 LCD_INSTR_CMD, 0xf2, // SET_GAMMA3
112 LCD_INSTR_DAT, 0x4a,
113 LCD_INSTR_DAT, 0x10,
114 LCD_INSTR_DAT, 0x0a,
115 LCD_INSTR_DAT, 0x0a,
116 LCD_INSTR_DAT, 0x26,
117 LCD_INSTR_DAT, 0x39,
118
119 LCD_INSTR_CMD, 0xf1, // SET_GAMMA2
120 LCD_INSTR_DAT, 0x50,
121 LCD_INSTR_DAT, 0x8f,
122 LCD_INSTR_DAT, 0xaf,
123 LCD_INSTR_DAT, 0x3b,
124 LCD_INSTR_DAT, 0x3f,
125 LCD_INSTR_DAT, 0x7f,
126
127 LCD_INSTR_CMD, 0xf3, // SET_GAMMA4
128 LCD_INSTR_DAT, 0x50,
129 LCD_INSTR_DAT, 0x8f,
130 LCD_INSTR_DAT, 0xaf,
131 LCD_INSTR_DAT, 0x3b,
132 LCD_INSTR_DAT, 0x3f,
133 LCD_INSTR_DAT, 0x7f,
134
135 LCD_INSTR_CMD, 0xba, // TE Control
136 LCD_INSTR_DAT, 0x0a,
137
138#ifdef BOOTLOADER
139 LCD_INSTR_CMD, 0x35, // Tearing Effect Line ON
140 LCD_INSTR_DAT, 0x00,
141#endif
142
143 LCD_INSTR_CMD, 0x21, /* Invert */
144
145 /* Lock EXTC? */
146 LCD_INSTR_CMD, 0xfe, // Inter Register Enable1
147 LCD_INSTR_CMD, 0xee,
148
149 /* Exit Sleep */
150 LCD_INSTR_CMD, 0x11,
151 LCD_INSTR_UDELAY, 120000,
152 /* Display On */
153 LCD_INSTR_CMD, 0x29,
154 LCD_INSTR_UDELAY, 20000,
155 LCD_INSTR_END,
156};
157
158/* Original Display / Hifiwalker -1.5 / Surfans -2.7 */
159static const uint32_t erosqnative_lcd_cmd_enable_v1[] = {
33 /* Set EXTC? */ 160 /* Set EXTC? */
34 LCD_INSTR_CMD, 0xc8, 161 LCD_INSTR_CMD, 0xc8,
35 LCD_INSTR_DAT, 0xff, 162 LCD_INSTR_DAT, 0xff,
@@ -179,7 +306,22 @@ void lcd_tgt_enable(bool enable)
179 mdelay(5); 306 mdelay(5);
180 gpio_set_level(GPIO_LCD_CE, 0); 307 gpio_set_level(GPIO_LCD_CE, 0);
181 308
182 lcd_exec_commands(&erosqnative_lcd_cmd_enable[0]); 309#ifdef BOOTLOADER
310# if EROSQN_VER == 3
311 lcd_exec_commands(&erosqnative_lcd_cmd_enable_v3[0]);
312# else
313 lcd_exec_commands(&erosqnative_lcd_cmd_enable_v1[0]);
314# endif
315#else
316 if (device_data.lcd_version == 3)
317 {
318 lcd_exec_commands(&erosqnative_lcd_cmd_enable_v3[0]);
319 }
320 else
321 {
322 lcd_exec_commands(&erosqnative_lcd_cmd_enable_v1[0]);
323 }
324#endif
183 } else { 325 } else {
184 /* doesn't flash white if we don't do anything... */ 326 /* doesn't flash white if we don't do anything... */
185#if 0 327#if 0
diff --git a/firmware/target/mips/ingenic_x1000/msc-x1000.c b/firmware/target/mips/ingenic_x1000/msc-x1000.c
index 62172fa213..f0d417e4f7 100644
--- a/firmware/target/mips/ingenic_x1000/msc-x1000.c
+++ b/firmware/target/mips/ingenic_x1000/msc-x1000.c
@@ -844,7 +844,7 @@ int msc_cmd_send_csd(msc_drv* d)
844 d->cardinfo.csd[i] = req.response[i]; 844 d->cardinfo.csd[i] = req.response[i];
845 sd_parse_csd(&d->cardinfo); 845 sd_parse_csd(&d->cardinfo);
846 846
847 if((req.response[0] >> 30) == 1) 847 if(d->cardinfo.sd2plus)
848 d->driver_flags |= MSC_DF_V2_CARD; 848 d->driver_flags |= MSC_DF_V2_CARD;
849 849
850 return 0; 850 return 0;
diff --git a/firmware/target/mips/ingenic_x1000/sd-x1000.c b/firmware/target/mips/ingenic_x1000/sd-x1000.c
index 679a25a222..c1aec59aa3 100644
--- a/firmware/target/mips/ingenic_x1000/sd-x1000.c
+++ b/firmware/target/mips/ingenic_x1000/sd-x1000.c
@@ -51,7 +51,7 @@ static int sd_init_card(msc_drv* d)
51} 51}
52 52
53static int sd_transfer(msc_drv* d, bool write, 53static int sd_transfer(msc_drv* d, bool write,
54 unsigned long start, int count, void* buf) 54 sector_t start, int count, void* buf)
55{ 55{
56 int status = -1; 56 int status = -1;
57 57
@@ -114,6 +114,7 @@ static int sd_transfer(msc_drv* d, bool write,
114 : SD_READ_MULTIPLE_BLOCK; 114 : SD_READ_MULTIPLE_BLOCK;
115 } 115 }
116 116
117 // XXX 64-bit
117 if(d->driver_flags & MSC_DF_V2_CARD) 118 if(d->driver_flags & MSC_DF_V2_CARD)
118 req.argument = start; 119 req.argument = start;
119 else 120 else
@@ -142,14 +143,14 @@ static int sd_transfer(msc_drv* d, bool write,
142 return status; 143 return status;
143} 144}
144 145
145int sd_read_sectors(IF_MD(int drive,) unsigned long start, 146int sd_read_sectors(IF_MD(int drive,) sector_t start,
146 int count, void* buf) 147 int count, void* buf)
147{ 148{
148 return sd_transfer(sd_to_msc[IF_MD_DRV(drive)], false, 149 return sd_transfer(sd_to_msc[IF_MD_DRV(drive)], false,
149 start, count, buf); 150 start, count, buf);
150} 151}
151 152
152int sd_write_sectors(IF_MD(int drive,) unsigned long start, 153int sd_write_sectors(IF_MD(int drive,) sector_t start,
153 int count, const void* buf) 154 int count, const void* buf)
154{ 155{
155 return sd_transfer(sd_to_msc[IF_MD_DRV(drive)], true, 156 return sd_transfer(sd_to_msc[IF_MD_DRV(drive)], true,
@@ -187,6 +188,9 @@ long sd_last_disk_activity(void)
187 188
188bool sd_present(IF_MD_NONVOID(int drive)) 189bool sd_present(IF_MD_NONVOID(int drive))
189{ 190{
191#ifndef HAVE_MULTIDRIVE
192 int drive = 0;
193#endif
190 /* Seems that volume_properties() in firmware/common/disk.c may pass 194 /* Seems that volume_properties() in firmware/common/disk.c may pass
191 * drive = -1 when the SD card is not inserted, so just return false. 195 * drive = -1 when the SD card is not inserted, so just return false.
192 */ 196 */
@@ -198,6 +202,10 @@ bool sd_present(IF_MD_NONVOID(int drive))
198 202
199bool sd_removable(IF_MD_NONVOID(int drive)) 203bool sd_removable(IF_MD_NONVOID(int drive))
200{ 204{
205#ifndef HAVE_MULTIDRIVE
206 int drive = 0;
207#endif
208
201 /* Same reason as sd_present() */ 209 /* Same reason as sd_present() */
202 if(drive < 0) 210 if(drive < 0)
203 return false; 211 return false;
diff --git a/firmware/target/mips/ingenic_x1000/system-x1000.c b/firmware/target/mips/ingenic_x1000/system-x1000.c
index 64890a6c3a..1c850736b6 100644
--- a/firmware/target/mips/ingenic_x1000/system-x1000.c
+++ b/firmware/target/mips/ingenic_x1000/system-x1000.c
@@ -20,6 +20,7 @@
20 ****************************************************************************/ 20 ****************************************************************************/
21 21
22#include "system.h" 22#include "system.h"
23#include <string.h>
23#include "mips.h" 24#include "mips.h"
24#include "panic.h" 25#include "panic.h"
25#include "button.h" 26#include "button.h"
@@ -36,6 +37,10 @@
36#include "x1000/msc.h" 37#include "x1000/msc.h"
37#include "x1000/aic.h" 38#include "x1000/aic.h"
38 39
40#if defined(HAVE_DEVICEDATA)
41#include "devicedata.h"
42#endif
43
39#ifdef X1000_CPUIDLE_STATS 44#ifdef X1000_CPUIDLE_STATS
40int __cpu_idle_avg = 0; 45int __cpu_idle_avg = 0;
41int __cpu_idle_cur = 0; 46int __cpu_idle_cur = 0;
@@ -81,6 +86,20 @@ void system_early_init(void)
81 clk_init(); 86 clk_init();
82} 87}
83 88
89#if defined (HAVE_DEVICEDATA) && defined(EROS_QN)
90void fill_devicedata(struct device_data_t *data)
91{
92#ifdef BOOTLOADER
93 memset(data->payload, 0xff, data->length);
94 data->lcd_version = EROSQN_VER;
95#else
96 uint8_t lcd_version = device_data.lcd_version;
97 memset(data->payload, 0xff, data->length);
98 data->lcd_version = lcd_version;
99#endif
100}
101#endif
102
84/* First thing called from Rockbox main() */ 103/* First thing called from Rockbox main() */
85void system_init(void) 104void system_init(void)
86{ 105{
diff --git a/firmware/target/mips/ingenic_x1000/x1000boot.make b/firmware/target/mips/ingenic_x1000/x1000boot.make
index 0bdf5cf7b4..7a861b0a3d 100644
--- a/firmware/target/mips/ingenic_x1000/x1000boot.make
+++ b/firmware/target/mips/ingenic_x1000/x1000boot.make
@@ -12,7 +12,7 @@ include $(ROOTDIR)/lib/microtar/microtar.make
12INCLUDES += -I$(APPSDIR) 12INCLUDES += -I$(APPSDIR)
13SRC += $(call preprocess, $(APPSDIR)/SOURCES) 13SRC += $(call preprocess, $(APPSDIR)/SOURCES)
14 14
15LDSDEP := $(FIRMDIR)/export/cpu.h $(FIRMDIR)/export/config/$(MODELNAME).h 15LDSDEP := $(FIRMDIR)/export/cpu.h $(FIRMDIR)/export/config.h
16 16
17BOOTLDS := $(FIRMDIR)/target/$(CPU)/$(MANUFACTURER)/boot.lds 17BOOTLDS := $(FIRMDIR)/target/$(CPU)/$(MANUFACTURER)/boot.lds
18BOOTLINK := $(BUILDDIR)/boot.link 18BOOTLINK := $(BUILDDIR)/boot.link
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-17 22:11:09 +0000