1 files changed, 8 insertions, 9 deletions

diff --git a/firmware/target/mips/mmu-mips.h b/firmware/target/mips/mmu-mips.h
index b54807f060..b8f5ff0143 100644
--- a/firmware/target/mips/mmu-mips.h
+++ b/firmware/target/mips/mmu-mips.h
@@ -28,33 +28,32 @@
  * called safely eg. by the bootloader or RoLo, which need to flush the
  * cache before jumping to the loaded binary.
  */
-#ifndef MIPS_CACHEFUNC_ATTR
-# define MIPS_CACHEFUNC_ATTR  __attribute__((section(".icode")))
-#endif
+#define MIPS_CACHEFUNC_API(ret, name, args) \
+    ret name args __attribute__((section( ".icode." #name )))
 
 void map_address(unsigned long virtual, unsigned long physical,
                  unsigned long length, unsigned int cache_flags);
 void mmu_init(void);
 
 /* Commits entire DCache */
-void commit_dcache(void) MIPS_CACHEFUNC_ATTR;
+MIPS_CACHEFUNC_API(void, commit_dcache, (void));
 /* Commit and discard entire DCache, will do writeback */
-void commit_discard_dcache(void) MIPS_CACHEFUNC_ATTR;
+MIPS_CACHEFUNC_API(void, commit_discard_dcache, (void));
 
 /* Write DCache back to RAM for the given range and remove cache lines
  * from DCache afterwards */
-void commit_discard_dcache_range(const void *base, unsigned int size) MIPS_CACHEFUNC_ATTR;
+MIPS_CACHEFUNC_API(void, commit_discard_dcache_range, (const void *base, unsigned int size));
 
 /* Write DCache back to RAM for the given range */
-void commit_dcache_range(const void *base, unsigned int size) MIPS_CACHEFUNC_ATTR;
+MIPS_CACHEFUNC_API(void, commit_dcache_range, (const void *base, unsigned int size));
 
 /*
  * Remove cache lines for the given range from DCache
  * will *NOT* do write back except for buffer edges not on a line boundary
  */
-void discard_dcache_range(const void *base, unsigned int size) MIPS_CACHEFUNC_ATTR;
+MIPS_CACHEFUNC_API(void, discard_dcache_range, (const void *base, unsigned int size));
 
 /* Discards the entire ICache, and commit+discards the entire DCache */
-void commit_discard_idcache(void) MIPS_CACHEFUNC_ATTR;
+MIPS_CACHEFUNC_API(void, commit_discard_idcache, (void));
 
 #endif /* __MMU_MIPS_INCLUDE_H */