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Diffstat (limited to 'firmware/target/mips/ingenic_x1000/spl-x1000.c')
-rw-r--r--firmware/target/mips/ingenic_x1000/spl-x1000.c62
1 files changed, 2 insertions, 60 deletions
diff --git a/firmware/target/mips/ingenic_x1000/spl-x1000.c b/firmware/target/mips/ingenic_x1000/spl-x1000.c
index 07453f6182..fd664e231d 100644
--- a/firmware/target/mips/ingenic_x1000/spl-x1000.c
+++ b/firmware/target/mips/ingenic_x1000/spl-x1000.c
@@ -21,14 +21,12 @@
21 21
22#include "spl-x1000.h" 22#include "spl-x1000.h"
23#include "clk-x1000.h" 23#include "clk-x1000.h"
24#include "nand-x1000.h"
25#include "system.h" 24#include "system.h"
26#include "x1000/cpm.h" 25#include "x1000/cpm.h"
27#include "x1000/ost.h" 26#include "x1000/ost.h"
28#include "x1000/ddrc.h" 27#include "x1000/ddrc.h"
29#include "x1000/ddrc_apb.h" 28#include "x1000/ddrc_apb.h"
30#include "x1000/ddrphy.h" 29#include "x1000/ddrphy.h"
31#include "ucl_decompress.h"
32 30
33#ifdef FIIO_M3K 31#ifdef FIIO_M3K
34# define SPL_DDR_MEMORYSIZE 64 32# define SPL_DDR_MEMORYSIZE 64
@@ -224,29 +222,6 @@ static void init(void)
224 ddr_init(); 222 ddr_init();
225} 223}
226 224
227static int nandread(uint32_t addr, uint32_t size, void* buffer)
228{
229 int rc;
230 int mf_id, dev_id;
231
232 if((rc = nand_open()))
233 return rc;
234 if((rc = nand_identify(&mf_id, &dev_id))) {
235 nand_close();
236 return rc;
237 }
238
239 rc = nand_read(addr, size, (uint8_t*)buffer);
240 nand_close();
241 return rc;
242}
243
244/* Entry point function type, defined to be Linux compatible. */
245typedef void(*entry_fn)(int, char**, int, int);
246
247/* Kernel command line arguments */
248static char* argv[2];
249
250/* This variable is defined by the maskrom. It's simply the level of the 225/* This variable is defined by the maskrom. It's simply the level of the
251 * boot_sel[2:0] pins (GPIOs B28-30) at boot time. Meaning of the bits: 226 * boot_sel[2:0] pins (GPIOs B28-30) at boot time. Meaning of the bits:
252 * 227 *
@@ -264,10 +239,6 @@ extern const uint32_t boot_sel;
264 239
265void spl_main(void) 240void spl_main(void)
266{ 241{
267 int opt_index;
268 uint8_t* load_addr;
269 const struct spl_boot_option* opt;
270
271 /* Basic hardware init */ 242 /* Basic hardware init */
272 init(); 243 init();
273 244
@@ -276,35 +247,6 @@ void spl_main(void)
276 if((boot_sel & 3) == 2) 247 if((boot_sel & 3) == 2)
277 return; 248 return;
278 249
279 /* Get the boot option */ 250 /* Just pass control to the target... */
280 opt_index = spl_get_boot_option(); 251 spl_target_boot();
281 opt = &spl_boot_options[opt_index];
282 load_addr = (uint8_t*)opt->load_addr;
283
284 /* Set up hardware, load stuff from flash */
285 spl_handle_pre_boot(opt_index);
286 if(nandread(opt->nand_addr, opt->nand_size, load_addr))
287 spl_error();
288
289 if(!opt->cmdline) {
290 /* No command line => we are booting Rockbox, decompress bootloader.
291 * In the case of Rockbox, load binary directly to exec address */
292 uint32_t out_size = X1000_DRAM_END - opt->exec_addr;
293 int rc = ucl_unpack(load_addr, opt->nand_size,
294 (uint8_t*)opt->exec_addr, &out_size);
295 if(rc != UCL_E_OK)
296 spl_error();
297 }
298
299 /* Reading the Linux command line from the bootloader is handled by
300 * arch/mips/xburst/core/prom.c -- see Ingenic kernel sources. It's
301 * simply an (int argc, char* argv[]) thing.
302 */
303 entry_fn entry = (entry_fn)opt->exec_addr;
304 argv[0] = 0;
305 argv[1] = (char*)opt->cmdline;
306
307 commit_discard_idcache();
308 entry(2, argv, 0, 0);
309 __builtin_unreachable();
310} 252}