diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/shanlingq1/spl-shanlingq1.c')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/shanlingq1/spl-shanlingq1.c | 116 |
1 files changed, 116 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_x1000/shanlingq1/spl-shanlingq1.c b/firmware/target/mips/ingenic_x1000/shanlingq1/spl-shanlingq1.c new file mode 100644 index 0000000000..33303c5e6b --- /dev/null +++ b/firmware/target/mips/ingenic_x1000/shanlingq1/spl-shanlingq1.c | |||
@@ -0,0 +1,116 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2021 Aidan MacDonald | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #include "system.h" | ||
23 | #include "clk-x1000.h" | ||
24 | #include "spl-x1000.h" | ||
25 | #include "gpio-x1000.h" | ||
26 | |||
27 | #define CMDLINE_COMMON \ | ||
28 | "mem=64M@0x0 no_console_suspend console=ttyS2,115200n8 lpj=5009408 ip=off" | ||
29 | #define CMDLINE_NORMAL \ | ||
30 | " init=/linuxrc ubi.mtd=5 root=ubi0:rootfs ubi.mtd=6 rootfstype=ubifs rw" | ||
31 | |||
32 | static int dualboot_setup(void) | ||
33 | { | ||
34 | spl_dualboot_init_clocktree(); | ||
35 | spl_dualboot_init_uart2(); | ||
36 | |||
37 | /* load PDMA MCU firmware */ | ||
38 | jz_writef(CPM_CLKGR, PDMA(0)); | ||
39 | return spl_storage_read(0x4000, 0x2000, (void*)0xb3422000); | ||
40 | } | ||
41 | |||
42 | const struct spl_boot_option spl_boot_options[] = { | ||
43 | [BOOT_OPTION_ROCKBOX] = { | ||
44 | .storage_addr = 0x6800, | ||
45 | .storage_size = 102 * 1024, | ||
46 | .load_addr = X1000_DRAM_BASE, | ||
47 | .exec_addr = X1000_DRAM_BASE, | ||
48 | .flags = BOOTFLAG_UCLPACK, | ||
49 | }, | ||
50 | [BOOT_OPTION_OFW_PLAYER] = { | ||
51 | .storage_addr = 0x140000, | ||
52 | .storage_size = 8 * 1024 * 1024, | ||
53 | .load_addr = 0x80efffc0, | ||
54 | .exec_addr = 0x80f00000, | ||
55 | .cmdline = CMDLINE_COMMON CMDLINE_NORMAL, | ||
56 | .cmdline_addr = 0x80004000, | ||
57 | .setup = dualboot_setup, | ||
58 | }, | ||
59 | [BOOT_OPTION_OFW_RECOVERY] = { | ||
60 | .storage_addr = 0x940000, | ||
61 | .storage_size = 10 * 1024 * 1024, | ||
62 | .load_addr = 0x80efffc0, | ||
63 | .exec_addr = 0x80f00000, | ||
64 | .cmdline = CMDLINE_COMMON, | ||
65 | .cmdline_addr = 0x80004000, | ||
66 | .setup = dualboot_setup, | ||
67 | }, | ||
68 | }; | ||
69 | |||
70 | int spl_get_boot_option(void) | ||
71 | { | ||
72 | /* Button debounce time in OST clock cycles */ | ||
73 | const uint32_t btn_stable_time = 100 * (X1000_EXCLK_FREQ / 4000); | ||
74 | |||
75 | /* Buttons to poll */ | ||
76 | const unsigned port = GPIO_B; | ||
77 | const uint32_t recov_pin = (1 << 22); /* Next */ | ||
78 | const uint32_t orig_fw_pin = (1 << 21); /* Prev */ | ||
79 | |||
80 | uint32_t pin = -1, lastpin = 0; | ||
81 | uint32_t deadline = 0; | ||
82 | int iter_count = 30; /* to avoid an infinite loop */ | ||
83 | |||
84 | /* set GPIOs to input state */ | ||
85 | gpioz_configure(port, recov_pin|orig_fw_pin, GPIOF_INPUT); | ||
86 | |||
87 | /* Poll until we get a stable reading */ | ||
88 | do { | ||
89 | lastpin = pin; | ||
90 | pin = ~REG_GPIO_PIN(port) & (recov_pin|orig_fw_pin); | ||
91 | if(pin != lastpin) { | ||
92 | deadline = __ost_read32() + btn_stable_time; | ||
93 | iter_count -= 1; | ||
94 | } | ||
95 | } while(iter_count > 0 && __ost_read32() < deadline); | ||
96 | |||
97 | if(iter_count >= 0 && (pin & orig_fw_pin)) { | ||
98 | if(pin & recov_pin) | ||
99 | return BOOT_OPTION_OFW_RECOVERY; | ||
100 | else | ||
101 | return BOOT_OPTION_OFW_PLAYER; | ||
102 | } | ||
103 | |||
104 | return BOOT_OPTION_ROCKBOX; | ||
105 | } | ||
106 | |||
107 | void spl_error(void) | ||
108 | { | ||
109 | /* Flash the backlight */ | ||
110 | int level = 0; | ||
111 | while(1) { | ||
112 | gpio_set_function(GPIO_PC(25), GPIOF_OUTPUT(level)); | ||
113 | mdelay(100); | ||
114 | level = 1 - level; | ||
115 | } | ||
116 | } | ||