diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/sfc-x1000.h')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/sfc-x1000.h | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_x1000/sfc-x1000.h b/firmware/target/mips/ingenic_x1000/sfc-x1000.h new file mode 100644 index 0000000000..283f171697 --- /dev/null +++ b/firmware/target/mips/ingenic_x1000/sfc-x1000.h | |||
@@ -0,0 +1,105 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2021 Aidan MacDonald | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #include <stdint.h> | ||
23 | #include <stdbool.h> | ||
24 | #include "clk-x1000.h" | ||
25 | #include "x1000/sfc.h" | ||
26 | |||
27 | /* SPI flash controller interface -- this is a low-level driver upon which | ||
28 | * you can build NAND/NOR flash drivers. The main function is sfc_exec(), | ||
29 | * used to issue commands, transfer data, etc. | ||
30 | */ | ||
31 | |||
32 | #define SFC_FLAG_READ 0x01 /* Read data */ | ||
33 | #define SFC_FLAG_WRITE 0x02 /* Write data */ | ||
34 | #define SFC_FLAG_DUMMYFIRST 0x04 /* Do dummy bits before sending address. | ||
35 | * Default is dummy bits after address. | ||
36 | */ | ||
37 | |||
38 | /* SPI transfer mode. If in doubt, check with the X1000 manual and confirm | ||
39 | * the transfer format is what you expect. | ||
40 | */ | ||
41 | #define SFC_MODE_STANDARD 0 | ||
42 | #define SFC_MODE_DUAL_IN_DUAL_OUT 1 | ||
43 | #define SFC_MODE_DUAL_IO 2 | ||
44 | #define SFC_MODE_FULL_DUAL_IO 3 | ||
45 | #define SFC_MODE_QUAD_IN_QUAD_OUT 4 | ||
46 | #define SFC_MODE_QUAD_IO 5 | ||
47 | #define SFC_MODE_FULL_QUAD_IO 6 | ||
48 | |||
49 | /* Return status codes for sfc_exec() */ | ||
50 | #define SFC_STATUS_OK 0 | ||
51 | #define SFC_STATUS_OVERFLOW 1 | ||
52 | #define SFC_STATUS_UNDERFLOW 2 | ||
53 | #define SFC_STATUS_LOCKUP 3 | ||
54 | |||
55 | typedef struct sfc_op { | ||
56 | int command; /* Command number */ | ||
57 | int mode; /* SPI transfer mode */ | ||
58 | int flags; /* Flags for this op */ | ||
59 | int addr_bytes; /* Number of address bytes */ | ||
60 | int dummy_bits; /* Number of dummy bits (yes: bits, not bytes) */ | ||
61 | uint32_t addr_lo; /* Lower 32 bits of address */ | ||
62 | uint32_t addr_hi; /* Upper 32 bits of address */ | ||
63 | int data_bytes; /* Number of data bytes to read/write */ | ||
64 | void* buffer; /* Data buffer -- MUST be word-aligned */ | ||
65 | } sfc_op; | ||
66 | |||
67 | /* One-time driver init for mutexes/etc needed for handling interrupts. | ||
68 | * This can be safely called multiple times; only the first call will | ||
69 | * actually perform the init. | ||
70 | */ | ||
71 | extern void sfc_init(void); | ||
72 | |||
73 | /* Controller mutex -- lock before touching the driver */ | ||
74 | extern void sfc_lock(void); | ||
75 | extern void sfc_unlock(void); | ||
76 | |||
77 | /* Open/close the driver. The driver must be open in order to do operations. | ||
78 | * Closing the driver shuts off the hardware; the driver can be re-opened at | ||
79 | * a later time when it's needed again. | ||
80 | * | ||
81 | * After opening the driver, you must also program a valid device configuration | ||
82 | * and clock rate using sfc_set_dev_conf() and sfc_set_clock(). | ||
83 | */ | ||
84 | extern void sfc_open(void); | ||
85 | extern void sfc_close(void); | ||
86 | |||
87 | /* These functions can be called at any time while the driver is open, but | ||
88 | * must not be called while there is an operation in progress. It's the | ||
89 | * caller's job to ensure the configuration will work with the device and | ||
90 | * be capable of reading back data correctly. | ||
91 | * | ||
92 | * - sfc_set_dev_conf() writes its argument to the SFC_DEV_CONF register. | ||
93 | * - sfc_set_wp_enable() sets the state of the write-protect pin (WP). | ||
94 | * - sfc_set_clock() sets the controller clock frequency (in Hz). | ||
95 | */ | ||
96 | #define sfc_set_dev_conf(dev_conf) \ | ||
97 | do { REG_SFC_DEV_CONF = (dev_conf); } while(0) | ||
98 | |||
99 | #define sfc_set_wp_enable(en) \ | ||
100 | jz_writef(SFC_GLB, WP_EN((en) ? 1 : 0)) | ||
101 | |||
102 | extern void sfc_set_clock(x1000_clk_t clksrc, uint32_t freq); | ||
103 | |||
104 | /* Execute an operation. Returns zero on success, nonzero on failure. */ | ||
105 | extern int sfc_exec(const sfc_op* op); | ||