diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/nand-x1000.h')
| -rw-r--r-- | firmware/target/mips/ingenic_x1000/nand-x1000.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_x1000/nand-x1000.h b/firmware/target/mips/ingenic_x1000/nand-x1000.h index 0a22a4ff3c..61e0bbebc9 100644 --- a/firmware/target/mips/ingenic_x1000/nand-x1000.h +++ b/firmware/target/mips/ingenic_x1000/nand-x1000.h | |||
| @@ -32,6 +32,7 @@ | |||
| 32 | #define NAND_ERR_PROGRAM_FAIL (-2) | 32 | #define NAND_ERR_PROGRAM_FAIL (-2) |
| 33 | #define NAND_ERR_ERASE_FAIL (-3) | 33 | #define NAND_ERR_ERASE_FAIL (-3) |
| 34 | #define NAND_ERR_UNALIGNED (-4) | 34 | #define NAND_ERR_UNALIGNED (-4) |
| 35 | #define NAND_ERR_ECC_FAIL (-5) | ||
| 35 | 36 | ||
| 36 | /* keep max page size in sync with the NAND chip table in the .c file */ | 37 | /* keep max page size in sync with the NAND chip table in the .c file */ |
| 37 | #define NAND_DRV_SCRATCHSIZE 32 | 38 | #define NAND_DRV_SCRATCHSIZE 32 |
| @@ -43,6 +44,8 @@ | |||
| 43 | #define NAND_CHIPFLAG_HAS_QE_BIT 0x0002 | 44 | #define NAND_CHIPFLAG_HAS_QE_BIT 0x0002 |
| 44 | /* Chip has 2nd device ID byte */ | 45 | /* Chip has 2nd device ID byte */ |
| 45 | #define NAND_CHIPFLAG_HAS_DEVID2 0x0004 | 46 | #define NAND_CHIPFLAG_HAS_DEVID2 0x0004 |
| 47 | /* True if the chip has on-die ECC */ | ||
| 48 | #define NAND_CHIPFLAG_ON_DIE_ECC 0x0008 | ||
| 46 | 49 | ||
| 47 | /* cmd mode a d phase format has data */ | 50 | /* cmd mode a d phase format has data */ |
| 48 | #define NANDCMD_RESET SFC_CMD(0xff, SFC_TMODE_1_1_1, 0, 0, SFC_PFMT_ADDR_FIRST, 0) | 51 | #define NANDCMD_RESET SFC_CMD(0xff, SFC_TMODE_1_1_1, 0, 0, SFC_PFMT_ADDR_FIRST, 0) |