diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/nand-x1000.h')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/nand-x1000.h | 35 |
1 files changed, 21 insertions, 14 deletions
diff --git a/firmware/target/mips/ingenic_x1000/nand-x1000.h b/firmware/target/mips/ingenic_x1000/nand-x1000.h index 227c71e3f4..2c3294cfad 100644 --- a/firmware/target/mips/ingenic_x1000/nand-x1000.h +++ b/firmware/target/mips/ingenic_x1000/nand-x1000.h | |||
@@ -42,10 +42,8 @@ | |||
42 | #define NAND_CHIPFLAG_QUAD 0x0001 | 42 | #define NAND_CHIPFLAG_QUAD 0x0001 |
43 | /* Chip requires QE bit set to enable quad I/O mode */ | 43 | /* Chip requires QE bit set to enable quad I/O mode */ |
44 | #define NAND_CHIPFLAG_HAS_QE_BIT 0x0002 | 44 | #define NAND_CHIPFLAG_HAS_QE_BIT 0x0002 |
45 | /* Chip has 2nd device ID byte */ | ||
46 | #define NAND_CHIPFLAG_HAS_DEVID2 0x0004 | ||
47 | /* True if the chip has on-die ECC */ | 45 | /* True if the chip has on-die ECC */ |
48 | #define NAND_CHIPFLAG_ON_DIE_ECC 0x0008 | 46 | #define NAND_CHIPFLAG_ON_DIE_ECC 0x0004 |
49 | 47 | ||
50 | /* cmd mode a d phase format has data */ | 48 | /* cmd mode a d phase format has data */ |
51 | #define NANDCMD_RESET SFC_CMD(0xff, SFC_TMODE_1_1_1, 0, 0, SFC_PFMT_ADDR_FIRST, 0) | 49 | #define NANDCMD_RESET SFC_CMD(0xff, SFC_TMODE_1_1_1, 0, 0, SFC_PFMT_ADDR_FIRST, 0) |
@@ -103,11 +101,6 @@ typedef uint32_t nand_page_t; | |||
103 | struct nand_drv; | 101 | struct nand_drv; |
104 | 102 | ||
105 | struct nand_chip { | 103 | struct nand_chip { |
106 | /* Manufacturer and device ID bytes */ | ||
107 | uint8_t mf_id; | ||
108 | uint8_t dev_id; | ||
109 | uint8_t dev_id2; | ||
110 | |||
111 | /* Base2 logarithm of the number of pages per block */ | 104 | /* Base2 logarithm of the number of pages per block */ |
112 | unsigned log2_ppb; | 105 | unsigned log2_ppb; |
113 | 106 | ||
@@ -141,6 +134,25 @@ struct nand_chip { | |||
141 | void(*setup_chip)(struct nand_drv* drv); | 134 | void(*setup_chip)(struct nand_drv* drv); |
142 | }; | 135 | }; |
143 | 136 | ||
137 | enum nand_readid_method { | ||
138 | NAND_READID_OPCODE, | ||
139 | NAND_READID_ADDR, | ||
140 | NAND_READID_DUMMY, | ||
141 | }; | ||
142 | |||
143 | struct nand_chip_id { | ||
144 | uint8_t method; | ||
145 | uint8_t num_id_bytes; | ||
146 | uint8_t id_bytes[4]; | ||
147 | const struct nand_chip* chip; | ||
148 | }; | ||
149 | |||
150 | #define NAND_CHIP_ID(_chip, _method, ...) \ | ||
151 | { .method = _method, \ | ||
152 | .num_id_bytes = ARRAYLEN(((uint8_t[]){__VA_ARGS__})), \ | ||
153 | .id_bytes = {__VA_ARGS__}, \ | ||
154 | .chip = _chip } | ||
155 | |||
144 | struct nand_drv { | 156 | struct nand_drv { |
145 | /* NAND access lock. Needs to be held during any operations. */ | 157 | /* NAND access lock. Needs to be held during any operations. */ |
146 | struct mutex mutex; | 158 | struct mutex mutex; |
@@ -170,14 +182,9 @@ struct nand_drv { | |||
170 | 182 | ||
171 | /* Full page size = chip->page_size + chip->oob_size */ | 183 | /* Full page size = chip->page_size + chip->oob_size */ |
172 | unsigned fpage_size; | 184 | unsigned fpage_size; |
173 | |||
174 | /* Probed mf_id / dev_id for debugging, in case identification fails. */ | ||
175 | uint8_t mf_id; | ||
176 | uint8_t dev_id; | ||
177 | uint8_t dev_id2; | ||
178 | }; | 185 | }; |
179 | 186 | ||
180 | extern const struct nand_chip supported_nand_chips[]; | 187 | extern const struct nand_chip_id supported_nand_chips[]; |
181 | extern const size_t nr_supported_nand_chips; | 188 | extern const size_t nr_supported_nand_chips; |
182 | 189 | ||
183 | /* Return the static NAND driver instance. | 190 | /* Return the static NAND driver instance. |