diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/irq-x1000.h')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/irq-x1000.h | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_x1000/irq-x1000.h b/firmware/target/mips/ingenic_x1000/irq-x1000.h new file mode 100644 index 0000000000..849e436dcf --- /dev/null +++ b/firmware/target/mips/ingenic_x1000/irq-x1000.h | |||
@@ -0,0 +1,115 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2021 Aidan MacDonald | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #ifndef __IRQ_X1000_H__ | ||
23 | #define __IRQ_X1000_H__ | ||
24 | |||
25 | /* INTC(0) interrupts */ | ||
26 | #define IRQ0_DMIC 0 | ||
27 | #define IRQ0_AIC 1 | ||
28 | #define IRQ0_SFC 7 | ||
29 | #define IRQ0_SSI 8 | ||
30 | #define IRQ0_PDMA 10 | ||
31 | #define IRQ0_PDMAD 11 | ||
32 | #define IRQ0_GPIO3 14 | ||
33 | #define IRQ0_GPIO2 15 | ||
34 | #define IRQ0_GPIO1 16 | ||
35 | #define IRQ0_GPIO0 17 | ||
36 | #define IRQ0_OTG 21 | ||
37 | #define IRQ0_AES 23 | ||
38 | #define IRQ0_TCU2 25 | ||
39 | #define IRQ0_TCU1 26 | ||
40 | #define IRQ0_TCU0 27 | ||
41 | #define IRQ0_CIM 30 | ||
42 | #define IRQ0_LCD 31 | ||
43 | |||
44 | /* INTC(1) interrupts */ | ||
45 | #define IRQ1_RTC 0 | ||
46 | #define IRQ1_MSC1 4 | ||
47 | #define IRQ1_MSC0 5 | ||
48 | #define IRQ1_SCC 6 | ||
49 | #define IRQ1_PCM 8 | ||
50 | #define IRQ1_HARB2 12 | ||
51 | #define IRQ1_HARB0 14 | ||
52 | #define IRQ1_CPM 15 | ||
53 | #define IRQ1_UART2 17 | ||
54 | #define IRQ1_UART1 18 | ||
55 | #define IRQ1_UART0 19 | ||
56 | #define IRQ1_DDR 20 | ||
57 | #define IRQ1_EFUSE 22 | ||
58 | #define IRQ1_MAC 23 | ||
59 | #define IRQ1_I2C2 26 | ||
60 | #define IRQ1_I2C1 27 | ||
61 | #define IRQ1_I2C0 28 | ||
62 | #define IRQ1_I2C(c) (28 - (c)) | ||
63 | #define IRQ1_PDMAM 29 | ||
64 | #define IRQ1_JPEG 30 | ||
65 | |||
66 | /* Unified IRQ numbers */ | ||
67 | #define IRQ_DMIC IRQ0_DMIC | ||
68 | #define IRQ_AIC IRQ0_AIC | ||
69 | #define IRQ_SFC IRQ0_SFC | ||
70 | #define IRQ_SSI IRQ0_SSI | ||
71 | #define IRQ_PDMA IRQ0_PDMA | ||
72 | #define IRQ_PDMAD IRQ0_PDMAD | ||
73 | #define IRQ_GPIO3 IRQ0_GPIO3 | ||
74 | #define IRQ_GPIO2 IRQ0_GPIO2 | ||
75 | #define IRQ_GPIO1 IRQ0_GPIO1 | ||
76 | #define IRQ_GPIO0 IRQ0_GPIO0 | ||
77 | #define IRQ_OTG IRQ0_OTG | ||
78 | #define IRQ_AES IRQ0_AES | ||
79 | #define IRQ_TCU2 IRQ0_TCU2 | ||
80 | #define IRQ_TCU1 IRQ0_TCU1 | ||
81 | #define IRQ_TCU0 IRQ0_TCU0 | ||
82 | #define IRQ_CIM IRQ0_CIM | ||
83 | #define IRQ_LCD IRQ0_LCD | ||
84 | #define IRQ_RTC (32+IRQ1_RTC) | ||
85 | #define IRQ_MSC1 (32+IRQ1_MSC1) | ||
86 | #define IRQ_MSC0 (32+IRQ1_MSC0) | ||
87 | #define IRQ_SCC (32+IRQ1_SCC) | ||
88 | #define IRQ_PCM (32+IRQ1_PCM) | ||
89 | #define IRQ_HARB2 (32+IRQ1_HARB2) | ||
90 | #define IRQ_HARB0 (32+IRQ1_HARB0) | ||
91 | #define IRQ_CPM (32+IRQ1_CPM) | ||
92 | #define IRQ_UART2 (32+IRQ1_UART2) | ||
93 | #define IRQ_UART1 (32+IRQ1_UART1) | ||
94 | #define IRQ_UART0 (32+IRQ1_UART0) | ||
95 | #define IRQ_DDR (32+IRQ1_DDR) | ||
96 | #define IRQ_EFUSE (32+IRQ1_EFUSE) | ||
97 | #define IRQ_MAC (32+IRQ1_MAC) | ||
98 | #define IRQ_I2C2 (32+IRQ1_I2C2) | ||
99 | #define IRQ_I2C1 (32+IRQ1_I2C1) | ||
100 | #define IRQ_I2C0 (32+IRQ1_I2C0) | ||
101 | #define IRQ_I2C(c) (32+IRQ1_I2C(c)) | ||
102 | #define IRQ_PDMAM (32+IRQ1_PDMAM) | ||
103 | #define IRQ_JPEG (32+IRQ1_JPEG) | ||
104 | #define IRQ_GPIO(port, pin) (64 + 32*(port) + (pin)) | ||
105 | |||
106 | #define IRQ_IS_GROUP0(irq) (((irq) & 0xffffff20) == 0x00) | ||
107 | #define IRQ_IS_GROUP1(irq) (((irq) & 0xffffff20) == 0x20) | ||
108 | #define IRQ_IS_GPIO(irq) ((irq) >= 64) | ||
109 | |||
110 | #define IRQ_TO_GROUP0(irq) (irq) | ||
111 | #define IRQ_TO_GROUP1(irq) ((irq) - 32) | ||
112 | #define IRQ_TO_GPIO_PORT(irq) (((irq) - 64) >> 5) | ||
113 | #define IRQ_TO_GPIO_PIN(irq) (((irq) - 64) & 0x1f) | ||
114 | |||
115 | #endif /* __IRQ_X1000_H__ */ | ||