diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c | 44 |
1 files changed, 30 insertions, 14 deletions
diff --git a/firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c b/firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c index 7c56e4ac19..5680b1e548 100644 --- a/firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c +++ b/firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c | |||
@@ -119,6 +119,29 @@ void spl_error(void) | |||
119 | } | 119 | } |
120 | } | 120 | } |
121 | 121 | ||
122 | nand_drv* alloc_nand_drv(uint32_t laddr, uint32_t lsize) | ||
123 | { | ||
124 | size_t need_size = sizeof(nand_drv) + | ||
125 | NAND_DRV_SCRATCHSIZE + | ||
126 | NAND_DRV_MAXPAGESIZE; | ||
127 | |||
128 | /* find a hole to keep the buffers */ | ||
129 | uintptr_t addr; | ||
130 | if(X1000_SDRAM_BASE + need_size <= laddr) | ||
131 | addr = X1000_SDRAM_BASE; | ||
132 | else | ||
133 | addr = CACHEALIGN_UP(X1000_SDRAM_BASE + laddr + lsize); | ||
134 | |||
135 | uint8_t* page_buf = (uint8_t*)addr; | ||
136 | uint8_t* scratch_buf = page_buf + NAND_DRV_MAXPAGESIZE; | ||
137 | nand_drv* drv = (nand_drv*)(scratch_buf + NAND_DRV_SCRATCHSIZE); | ||
138 | |||
139 | drv->page_buf = page_buf; | ||
140 | drv->scratch_buf = scratch_buf; | ||
141 | drv->refcount = 0; | ||
142 | return drv; | ||
143 | } | ||
144 | |||
122 | void spl_target_boot(void) | 145 | void spl_target_boot(void) |
123 | { | 146 | { |
124 | int opt_index = spl_get_boot_option(); | 147 | int opt_index = spl_get_boot_option(); |
@@ -134,33 +157,26 @@ void spl_target_boot(void) | |||
134 | gpioz_configure(GPIO_A, 0x3f << 26, GPIOF_DEVICE(1)); | 157 | gpioz_configure(GPIO_A, 0x3f << 26, GPIOF_DEVICE(1)); |
135 | 158 | ||
136 | /* Open NAND chip */ | 159 | /* Open NAND chip */ |
137 | int rc = nand_open(); | 160 | nand_drv* ndrv = alloc_nand_drv(opt->load_addr, opt->nand_size); |
161 | int rc = nand_open(ndrv); | ||
138 | if(rc) | 162 | if(rc) |
139 | spl_error(); | 163 | spl_error(); |
140 | 164 | ||
141 | int mf_id, dev_id; | ||
142 | rc = nand_identify(&mf_id, &dev_id); | ||
143 | if(rc) | ||
144 | goto nand_err; | ||
145 | |||
146 | /* For OF only: load DMA coprocessor's firmware from flash */ | 165 | /* For OF only: load DMA coprocessor's firmware from flash */ |
147 | if(opt_index != BOOTOPTION_ROCKBOX) { | 166 | if(opt_index != BOOTOPTION_ROCKBOX) { |
148 | rc = nand_read(0x4000, 0x2000, (uint8_t*)0xb3422000); | 167 | rc = nand_read_bytes(ndrv, 0x4000, 0x2000, (uint8_t*)0xb3422000); |
149 | if(rc) | 168 | if(rc) |
150 | goto nand_err; | 169 | goto nand_err; |
151 | } | 170 | } |
152 | 171 | ||
153 | /* Read the firmware */ | 172 | /* Read the firmware */ |
154 | rc = nand_read(opt->nand_addr, opt->nand_size, load_addr); | 173 | rc = nand_read_bytes(ndrv, opt->nand_addr, opt->nand_size, load_addr); |
155 | if(rc) | 174 | if(rc) |
156 | goto nand_err; | 175 | goto nand_err; |
157 | 176 | ||
158 | /* Rockbox doesn't need the NAND; for the OF, we should leave it open | 177 | /* Rockbox doesn't need the NAND; for the OF, we should leave it open */ |
159 | * and also make sure to turn off the write protect bits. */ | ||
160 | if(opt_index == BOOTOPTION_ROCKBOX) | 178 | if(opt_index == BOOTOPTION_ROCKBOX) |
161 | nand_close(); | 179 | nand_close(ndrv); |
162 | else | ||
163 | nand_enable_writes(true); | ||
164 | 180 | ||
165 | /* Kernel arguments pointer, for Linux only */ | 181 | /* Kernel arguments pointer, for Linux only */ |
166 | char** kargv = (char**)0x80004000; | 182 | char** kargv = (char**)0x80004000; |
@@ -184,7 +200,7 @@ void spl_target_boot(void) | |||
184 | __builtin_unreachable(); | 200 | __builtin_unreachable(); |
185 | 201 | ||
186 | nand_err: | 202 | nand_err: |
187 | nand_close(); | 203 | nand_close(ndrv); |
188 | spl_error(); | 204 | spl_error(); |
189 | } | 205 | } |
190 | 206 | ||