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Diffstat (limited to 'firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c')
-rw-r--r--firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c65
1 files changed, 0 insertions, 65 deletions
diff --git a/firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c b/firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c
index cbbe8b1d5d..771082b2a7 100644
--- a/firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c
+++ b/firmware/target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c
@@ -24,21 +24,6 @@
24#include "spl-x1000.h" 24#include "spl-x1000.h"
25#include "gpio-x1000.h" 25#include "gpio-x1000.h"
26 26
27#define CMDLINE_COMMON \
28 "mem=64M@0x0 no_console_suspend console=ttyS2,115200n8 lpj=5009408 ip=off"
29#define CMDLINE_NORMAL \
30 " init=/linuxrc ubi.mtd=3 root=ubi0:rootfs ubi.mtd=4 rootfstype=ubifs rw loglevel=8"
31
32static int dualboot_setup(void)
33{
34 spl_dualboot_init_clocktree();
35 spl_dualboot_init_uart2();
36
37 /* load PDMA MCU firmware */
38 jz_writef(CPM_CLKGR, PDMA(0));
39 return spl_storage_read(0x4000, 0x2000, (void*)0xb3422000);
40}
41
42const struct spl_boot_option spl_boot_options[] = { 27const struct spl_boot_option spl_boot_options[] = {
43 [BOOT_OPTION_ROCKBOX] = { 28 [BOOT_OPTION_ROCKBOX] = {
44 .storage_addr = 0x6800, 29 .storage_addr = 0x6800,
@@ -47,60 +32,10 @@ const struct spl_boot_option spl_boot_options[] = {
47 .exec_addr = X1000_DRAM_BASE, 32 .exec_addr = X1000_DRAM_BASE,
48 .flags = BOOTFLAG_UCLPACK, 33 .flags = BOOTFLAG_UCLPACK,
49 }, 34 },
50 [BOOT_OPTION_OFW_PLAYER] = {
51 .storage_addr = 0x20000,
52 .storage_size = 4 * 1024 * 1024,
53 .load_addr = 0x80efffc0,
54 .exec_addr = 0x80f00000,
55 .cmdline = CMDLINE_COMMON CMDLINE_NORMAL,
56 .cmdline_addr = 0x80004000,
57 .setup = dualboot_setup,
58 },
59 [BOOT_OPTION_OFW_RECOVERY] = {
60 .storage_addr = 0x420000,
61 .storage_size = 5 * 1024 * 1024,
62 .load_addr = 0x80efffc0,
63 .exec_addr = 0x80f00000,
64 .cmdline = CMDLINE_COMMON,
65 .cmdline_addr = 0x80004000,
66 .setup = dualboot_setup,
67 },
68}; 35};
69 36
70int spl_get_boot_option(void) 37int spl_get_boot_option(void)
71{ 38{
72 /* Button debounce time in OST clock cycles */
73 const uint32_t btn_stable_time = 100 * (X1000_EXCLK_FREQ / 4000);
74
75 /* Buttons to poll */
76 const unsigned port = GPIO_A;
77 const uint32_t recov_pin = (1 << 19); /* Volume Up */
78 const uint32_t orig_fw_pin = (1 << 17); /* Play */
79
80 uint32_t pin = -1, lastpin = 0;
81 uint32_t deadline = 0;
82 int iter_count = 30; /* to avoid an infinite loop */
83
84 /* set GPIOs to input state */
85 gpioz_configure(port, recov_pin|orig_fw_pin, GPIOF_INPUT);
86
87 /* Poll until we get a stable reading */
88 do {
89 lastpin = pin;
90 pin = ~REG_GPIO_PIN(port) & (recov_pin|orig_fw_pin);
91 if(pin != lastpin) {
92 deadline = __ost_read32() + btn_stable_time;
93 iter_count -= 1;
94 }
95 } while(iter_count > 0 && __ost_read32() < deadline);
96
97 if(iter_count >= 0 && (pin & orig_fw_pin)) {
98 if(pin & recov_pin)
99 return BOOT_OPTION_OFW_RECOVERY;
100 else
101 return BOOT_OPTION_OFW_PLAYER;
102 }
103
104 return BOOT_OPTION_ROCKBOX; 39 return BOOT_OPTION_ROCKBOX;
105} 40}
106 41