diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/clk-x1000.h')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/clk-x1000.h | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_x1000/clk-x1000.h b/firmware/target/mips/ingenic_x1000/clk-x1000.h new file mode 100644 index 0000000000..76413b90d2 --- /dev/null +++ b/firmware/target/mips/ingenic_x1000/clk-x1000.h | |||
@@ -0,0 +1,82 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2021 Aidan MacDonald | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #ifndef __CLK_X1000_H__ | ||
23 | #define __CLK_X1000_H__ | ||
24 | |||
25 | #include <stdint.h> | ||
26 | #include "x1000/cpm.h" | ||
27 | |||
28 | /* Used as arguments to clk_set_ccr_mux() */ | ||
29 | #define CLKMUX_SCLK_A(x) jz_orf(CPM_CCR, SEL_SRC_V(x)) | ||
30 | #define CLKMUX_CPU(x) jz_orf(CPM_CCR, SEL_CPLL_V(x)) | ||
31 | #define CLKMUX_AHB0(x) jz_orf(CPM_CCR, SEL_H0PLL_V(x)) | ||
32 | #define CLKMUX_AHB2(x) jz_orf(CPM_CCR, SEL_H2PLL_V(x)) | ||
33 | |||
34 | typedef enum x1000_clk_t { | ||
35 | X1000_CLK_EXCLK, | ||
36 | X1000_CLK_APLL, | ||
37 | X1000_CLK_MPLL, | ||
38 | X1000_CLK_SCLK_A, | ||
39 | X1000_CLK_CPU, | ||
40 | X1000_CLK_L2CACHE, | ||
41 | X1000_CLK_AHB0, | ||
42 | X1000_CLK_AHB2, | ||
43 | X1000_CLK_PCLK, | ||
44 | X1000_CLK_DDR, | ||
45 | X1000_CLK_LCD, | ||
46 | X1000_CLK_MSC0, | ||
47 | X1000_CLK_MSC1, | ||
48 | X1000_CLK_I2S_MCLK, | ||
49 | X1000_CLK_I2S_BCLK, | ||
50 | X1000_CLK_SFC, | ||
51 | X1000_CLK_COUNT, | ||
52 | } x1000_clk_t; | ||
53 | |||
54 | /* Calculate the current frequency of a clock */ | ||
55 | extern uint32_t clk_get(x1000_clk_t clk); | ||
56 | |||
57 | /* Get the name of a clock for debug purposes */ | ||
58 | extern const char* clk_get_name(x1000_clk_t clk); | ||
59 | |||
60 | /* Sets system clock multiplexers */ | ||
61 | extern void clk_set_ccr_mux(uint32_t muxbits); | ||
62 | |||
63 | /* Sets system clock dividers */ | ||
64 | extern void clk_set_ccr_div(int cpu, int l2, int ahb0, int ahb2, int pclk); | ||
65 | |||
66 | /* Sets DDR clock source and divider */ | ||
67 | extern void clk_set_ddr(x1000_clk_t src, uint32_t div); | ||
68 | |||
69 | /* Returns the smallest n such that infreq/n <= outfreq */ | ||
70 | inline uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq) | ||
71 | { | ||
72 | return (infreq + (outfreq - 1)) / outfreq; | ||
73 | } | ||
74 | |||
75 | /* Returns the smallest n such that (infreq >> n) <= outfreq */ | ||
76 | inline uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq) | ||
77 | { | ||
78 | uint32_t div = clk_calc_div(infreq, outfreq); | ||
79 | return __builtin_clz(div) ^ 31; | ||
80 | } | ||
81 | |||
82 | #endif /* __CLK_X1000_H__ */ | ||