diff options
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/usb-jz4760.c')
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/usb-jz4760.c | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/usb-jz4760.c b/firmware/target/mips/ingenic_jz47xx/usb-jz4760.c index 6db4a25d5c..474d45edee 100644 --- a/firmware/target/mips/ingenic_jz47xx/usb-jz4760.c +++ b/firmware/target/mips/ingenic_jz47xx/usb-jz4760.c | |||
@@ -106,7 +106,7 @@ static volatile bool ep0_data_requested = false; | |||
106 | static struct usb_endpoint endpoints[] = | 106 | static struct usb_endpoint endpoints[] = |
107 | { | 107 | { |
108 | EP_INIT(ep_control, USB_FIFO_EP(0), 64, NULL), | 108 | EP_INIT(ep_control, USB_FIFO_EP(0), 64, NULL), |
109 | EP_INIT(ep_control, USB_FIFO_EP(0), 64, &ep0_rx.buf), | 109 | EP_INIT(ep_control, USB_FIFO_EP(0), 64, ep0_rx.buf), |
110 | EP_INIT(ep_bulk, USB_FIFO_EP(1), 512, NULL), | 110 | EP_INIT(ep_bulk, USB_FIFO_EP(1), 512, NULL), |
111 | EP_INIT(ep_bulk, USB_FIFO_EP(1), 512, NULL), | 111 | EP_INIT(ep_bulk, USB_FIFO_EP(1), 512, NULL), |
112 | EP_INIT(ep_interrupt, USB_FIFO_EP(2), 512, NULL), | 112 | EP_INIT(ep_interrupt, USB_FIFO_EP(2), 512, NULL), |
@@ -230,6 +230,8 @@ static void EP0_send(void) | |||
230 | select_endpoint(0); | 230 | select_endpoint(0); |
231 | csr0 = REG_USB_CSR0; | 231 | csr0 = REG_USB_CSR0; |
232 | 232 | ||
233 | logf("%s(): 0x%x %d %d", __func__, csr0, ep->sent, ep->length); | ||
234 | |||
233 | if(ep->sent == 0) | 235 | if(ep->sent == 0) |
234 | { | 236 | { |
235 | length = MIN(ep->length, ep->fifo_size); | 237 | length = MIN(ep->length, ep->fifo_size); |
@@ -245,7 +247,7 @@ static void EP0_send(void) | |||
245 | { | 247 | { |
246 | REG_USB_CSR0 = (csr0 | USB_CSR0_INPKTRDY | USB_CSR0_DATAEND); /* Set data end! */ | 248 | REG_USB_CSR0 = (csr0 | USB_CSR0_INPKTRDY | USB_CSR0_DATAEND); /* Set data end! */ |
247 | if (!ep->wait) | 249 | if (!ep->wait) |
248 | usb_core_transfer_complete(0, USB_DIR_IN, 0, ep->sent); | 250 | usb_core_transfer_complete(EP_CONTROL, USB_DIR_IN, 0, ep->sent); |
249 | ep->rc = 0; | 251 | ep->rc = 0; |
250 | ep_transfer_completed(ep); | 252 | ep_transfer_completed(ep); |
251 | } | 253 | } |
@@ -263,7 +265,7 @@ static void EP0_handler(void) | |||
263 | select_endpoint(0); | 265 | select_endpoint(0); |
264 | csr0 = REG_USB_CSR0; | 266 | csr0 = REG_USB_CSR0; |
265 | 267 | ||
266 | logf("%s(): 0x%x", __func__, csr0); | 268 | logf("%s(): 0x%x %d", __func__, csr0, ep_send->busy); |
267 | 269 | ||
268 | /* Check for SentStall: | 270 | /* Check for SentStall: |
269 | This bit is set when a STALL handshake is transmitted. The CPU should clear this bit. | 271 | This bit is set when a STALL handshake is transmitted. The CPU should clear this bit. |
@@ -288,12 +290,12 @@ static void EP0_handler(void) | |||
288 | if (ep_send->busy) | 290 | if (ep_send->busy) |
289 | { | 291 | { |
290 | if (!ep_send->wait) | 292 | if (!ep_send->wait) |
291 | usb_core_transfer_complete(0, USB_DIR_IN, -1, 0); | 293 | usb_core_transfer_complete(EP_CONTROL, USB_DIR_IN, -1, 0); |
292 | ep_transfer_completed(ep_send); | 294 | ep_transfer_completed(ep_send); |
293 | } | 295 | } |
294 | if (ep_recv->busy) | 296 | if (ep_recv->busy) |
295 | { | 297 | { |
296 | usb_core_transfer_complete(0, USB_DIR_OUT, -1, 0); | 298 | usb_core_transfer_complete(EP_CONTROL, USB_DIR_OUT, -1, 0); |
297 | ep_transfer_completed(ep_recv); | 299 | ep_transfer_completed(ep_recv); |
298 | } | 300 | } |
299 | } | 301 | } |
@@ -304,7 +306,7 @@ static void EP0_handler(void) | |||
304 | if (ep_send->busy) | 306 | if (ep_send->busy) |
305 | { | 307 | { |
306 | if (!ep_send->wait) | 308 | if (!ep_send->wait) |
307 | usb_core_transfer_complete(0, USB_DIR_IN, -1, 0); | 309 | usb_core_transfer_complete(EP_CONTROL, USB_DIR_IN, -1, 0); |
308 | ep_transfer_completed(ep_send); | 310 | ep_transfer_completed(ep_send); |
309 | } | 311 | } |
310 | if (ep_recv->busy && ep_recv->buf && ep_recv->length) | 312 | if (ep_recv->busy && ep_recv->buf && ep_recv->length) |
@@ -315,7 +317,7 @@ static void EP0_handler(void) | |||
315 | if (size < ep_recv->fifo_size || ep_recv->received >= ep_recv->length) | 317 | if (size < ep_recv->fifo_size || ep_recv->received >= ep_recv->length) |
316 | { | 318 | { |
317 | REG_USB_CSR0 = csr0 | USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND; /* Set data end! */ | 319 | REG_USB_CSR0 = csr0 | USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND; /* Set data end! */ |
318 | usb_core_transfer_complete(0, USB_DIR_OUT, 0, ep_recv->received); | 320 | usb_core_transfer_complete(EP_CONTROL, USB_DIR_OUT, 0, ep_recv->received); |
319 | ep_transfer_completed(ep_recv); | 321 | ep_transfer_completed(ep_recv); |
320 | } | 322 | } |
321 | else REG_USB_CSR0 = csr0 | USB_CSR0_SVDOUTPKTRDY; /* clear OUTPKTRDY bit */ | 323 | else REG_USB_CSR0 = csr0 | USB_CSR0_SVDOUTPKTRDY; /* clear OUTPKTRDY bit */ |
@@ -815,7 +817,8 @@ static void udc_reset(void) | |||
815 | { | 817 | { |
816 | if (endpoints[0].wait) | 818 | if (endpoints[0].wait) |
817 | semaphore_release(&endpoints[0].complete); | 819 | semaphore_release(&endpoints[0].complete); |
818 | else usb_core_transfer_complete(0, USB_DIR_IN, -1, 0); | 820 | else |
821 | usb_core_transfer_complete(EP_CONTROL, USB_DIR_IN, -1, 0); | ||
819 | } | 822 | } |
820 | 823 | ||
821 | endpoints[0].busy = false; | 824 | endpoints[0].busy = false; |
@@ -825,7 +828,7 @@ static void udc_reset(void) | |||
825 | endpoints[0].allocated = true; | 828 | endpoints[0].allocated = true; |
826 | 829 | ||
827 | if (endpoints[1].busy) | 830 | if (endpoints[1].busy) |
828 | usb_core_transfer_complete(0, USB_DIR_OUT, -1, 0); | 831 | usb_core_transfer_complete(EP_CONTROL, USB_DIR_OUT, -1, 0); |
829 | 832 | ||
830 | endpoints[1].busy = false; | 833 | endpoints[1].busy = false; |
831 | endpoints[1].wait = false; | 834 | endpoints[1].wait = false; |