summaryrefslogtreecommitdiff
path: root/firmware/target/mips/ingenic_jz47xx/timer-jz4760.c
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/timer-jz4760.c')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/timer-jz4760.c101
1 files changed, 101 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/timer-jz4760.c b/firmware/target/mips/ingenic_jz47xx/timer-jz4760.c
new file mode 100644
index 0000000000..0f16825b34
--- /dev/null
+++ b/firmware/target/mips/ingenic_jz47xx/timer-jz4760.c
@@ -0,0 +1,101 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2016 by Roman Stolyarov
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23#include "cpu.h"
24#include "system.h"
25#include "timer.h"
26
27/* Interrupt handler */
28void TCU1(void)
29{
30 __tcu_clear_full_match_flag(5);
31
32 if (pfn_timer != NULL)
33 pfn_timer();
34}
35
36bool timer_set(long cycles, bool start)
37{
38 unsigned int divider = cycles, prescaler_bit = 0, prescaler = 1, old_irq;
39
40 if(cycles < 1)
41 return false;
42
43 if(start && pfn_unregister != NULL)
44 {
45 pfn_unregister();
46 pfn_unregister = NULL;
47 }
48
49 /* Increase prescale values starting from 0 to make the cycle count fit */
50 while(divider > 65535 && prescaler <= 1024)
51 {
52 prescaler <<= 2; /* 1, 4, 16, 64, 256, 1024 */
53 prescaler_bit++;
54 divider = cycles / prescaler;
55 }
56
57 old_irq = disable_irq_save();
58
59 __tcu_stop_counter(5);
60 if(start)
61 {
62 __tcu_disable_pwm_output(5);
63
64 __tcu_mask_half_match_irq(5);
65 __tcu_unmask_full_match_irq(5);
66
67 /* EXTAL clock = CFG_EXTAL (12Mhz in most targets) */
68 __tcu_select_extalclk(5);
69 }
70
71 REG_TCU_TCSR(5) = (REG_TCU_TCSR(5) & ~TCSR_PRESCALE_MASK) | (prescaler_bit << TCSR_PRESCALE_LSB);
72 REG_TCU_TCNT(5) = 0;
73 REG_TCU_TDHR(5) = 0;
74 REG_TCU_TDFR(5) = divider;
75
76 __tcu_clear_full_match_flag(5);
77
78 if(start)
79 {
80 system_enable_irq(IRQ_TCU1);
81 __tcu_start_counter(5);
82 }
83
84 restore_irq(old_irq);
85
86 return true;
87}
88
89bool timer_start(void)
90{
91 __tcu_start_counter(5);
92
93 return true;
94}
95
96void timer_stop(void)
97{
98 unsigned int old_irq = disable_irq_save();
99 __tcu_stop_counter(5);
100 restore_irq(old_irq);
101}