summaryrefslogtreecommitdiff
path: root/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/system-jz4740.c')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/system-jz4740.c23
1 files changed, 20 insertions, 3 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
index c0a9bf19aa..978675825c 100644
--- a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
@@ -541,10 +541,11 @@ void system_reboot(void)
541void system_exception_wait(void) 541void system_exception_wait(void)
542{ 542{
543 /* check for power button without including any .h file */ 543 /* check for power button without including any .h file */
544 while (1) 544 while(1)
545 { 545 {
546 if( ~REG_GPIO_PXPIN(3) & (1 << 29) ) 546 if( (~REG_GPIO_PXPIN(3)) & (1 << 29) )
547 break; 547 return;
548 asm volatile("nop");
548 } 549 }
549} 550}
550 551
@@ -574,3 +575,19 @@ int system_memory_guard(int newmode)
574 (void)newmode; 575 (void)newmode;
575 return 0; 576 return 0;
576} 577}
578
579#ifdef HAVE_ADJUSTABLE_CPU_FREQ
580void set_cpu_frequency(long frequency)
581{
582 unsigned long cfcr = REG_CPM_CPCCR;
583 cfcr &= ~CPM_CPCCR_CDIV_MASK;
584
585 if(frequency == CPUFREQ_NORMAL)
586 cfcr |= (0 << CPM_CPCCR_CDIV_BIT);
587 else
588 cfcr |= (2 << CPM_CPCCR_CDIV_BIT);
589
590 REG_CPM_CPCCR = cfcr;
591 cpu_frequency = frequency;
592}
593#endif