diff options
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/system-jz4740.c')
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/system-jz4740.c | 34 |
1 files changed, 30 insertions, 4 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c index e878173abd..25b14106c4 100644 --- a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c | |||
@@ -345,9 +345,36 @@ void intr_handler(void) | |||
345 | return; | 345 | return; |
346 | } | 346 | } |
347 | 347 | ||
348 | #define EXC(x,y) if(_cause == (x)) return (y); | ||
349 | static char* parse_exception(unsigned int cause) | ||
350 | { | ||
351 | unsigned int _cause = cause & M_CauseExcCode; | ||
352 | EXC(EXC_INT, "Interrupt"); | ||
353 | EXC(EXC_MOD, "TLB Modified"); | ||
354 | EXC(EXC_TLBL, "TLB Exception (Load or Ifetch)"); | ||
355 | EXC(EXC_ADEL, "Address Error (Load or Ifetch)"); | ||
356 | EXC(EXC_ADES, "Address Error (Store)"); | ||
357 | EXC(EXC_TLBS, "TLB Exception (Store)"); | ||
358 | EXC(EXC_IBE, "Instruction Bus Error"); | ||
359 | EXC(EXC_DBE, "Data Bus Error"); | ||
360 | EXC(EXC_SYS, "Syscall"); | ||
361 | EXC(EXC_BP, "Breakpoint"); | ||
362 | EXC(EXC_RI, "Reserved Instruction"); | ||
363 | EXC(EXC_CPU, "Coprocessor Unusable"); | ||
364 | EXC(EXC_OV, "Overflow"); | ||
365 | EXC(EXC_TR, "Trap Instruction"); | ||
366 | EXC(EXC_FPE, "Floating Point Exception"); | ||
367 | EXC(EXC_C2E, "COP2 Exception"); | ||
368 | EXC(EXC_MDMX, "MDMX Exception"); | ||
369 | EXC(EXC_WATCH, "Watch Exception"); | ||
370 | EXC(EXC_MCHECK, "Machine Check Exception"); | ||
371 | EXC(EXC_CacheErr, "Cache error caused re-entry to Debug Mode"); | ||
372 | return NULL; | ||
373 | } | ||
374 | |||
348 | void exception_handler(void* stack_ptr, unsigned int cause, unsigned int epc) | 375 | void exception_handler(void* stack_ptr, unsigned int cause, unsigned int epc) |
349 | { | 376 | { |
350 | panicf("Exception occurred: [0x%x] at 0x%x (stack at 0x%x)", cause, epc, (unsigned int)stack_ptr); | 377 | panicf("Exception occurred: %s [0x%08x] at 0x%08x (stack at 0x%08x)", parse_exception(cause), cause, epc, (unsigned int)stack_ptr); |
351 | } | 378 | } |
352 | 379 | ||
353 | static const int FR2n[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; | 380 | static const int FR2n[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; |
@@ -559,9 +586,8 @@ void system_main(void) | |||
559 | __dcache_writeback_all(); | 586 | __dcache_writeback_all(); |
560 | __icache_invalidate_all(); | 587 | __icache_invalidate_all(); |
561 | 588 | ||
562 | /* Init interrupt handling */ | 589 | /* Disable all interrupts */ |
563 | ipl = 0; | 590 | for(i=0; i<IRQ_MAX; i++) |
564 | for(i=0;i<IRQ_MAX;i++) | ||
565 | dis_irq(i); | 591 | dis_irq(i); |
566 | 592 | ||
567 | sti(); | 593 | sti(); |