diff options
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/dma_acc-jz4740.c')
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/dma_acc-jz4740.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4740.c b/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4740.c index c4d79a7567..6f317f7b3f 100644 --- a/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4740.c | |||
@@ -26,14 +26,14 @@ void memset(void *target, unsigned char c, size_t len) | |||
26 | int ch = DMA_CHANNEL; | 26 | int ch = DMA_CHANNEL; |
27 | unsigned int d; | 27 | unsigned int d; |
28 | unsigned char *dp; | 28 | unsigned char *dp; |
29 | 29 | ||
30 | if(len < 32) | 30 | if(len < 32) |
31 | _memset(target,c,len); | 31 | _memset(target,c,len); |
32 | else | 32 | else |
33 | { | 33 | { |
34 | if(((unsigned int)target < 0xa0000000) && len) | 34 | if(((unsigned int)target < 0xa0000000) && len) |
35 | dma_cache_wback_inv((unsigned long)target, len); | 35 | dma_cache_wback_inv((unsigned long)target, len); |
36 | 36 | ||
37 | dp = (unsigned char *)((unsigned int)(&d) | 0xa0000000); | 37 | dp = (unsigned char *)((unsigned int)(&d) | 0xa0000000); |
38 | *(dp + 0) = c; | 38 | *(dp + 0) = c; |
39 | *(dp + 1) = c; | 39 | *(dp + 1) = c; |
@@ -45,16 +45,16 @@ void memset(void *target, unsigned char c, size_t len) | |||
45 | REG_DMAC_DRSR(ch) = DMAC_DRSR_RS_AUTO; | 45 | REG_DMAC_DRSR(ch) = DMAC_DRSR_RS_AUTO; |
46 | REG_DMAC_DCMD(ch) = DMAC_DCMD_DAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | DMAC_DCMD_DS_32BYTE; | 46 | REG_DMAC_DCMD(ch) = DMAC_DCMD_DAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | DMAC_DCMD_DS_32BYTE; |
47 | REG_DMAC_DCCSR(ch) = DMAC_DCCSR_EN | DMAC_DCCSR_NDES; | 47 | REG_DMAC_DCCSR(ch) = DMAC_DCCSR_EN | DMAC_DCCSR_NDES; |
48 | 48 | ||
49 | while (REG_DMAC_DTCR(ch)); | 49 | while (REG_DMAC_DTCR(ch)); |
50 | if(len % 32) | 50 | if(len % 32) |
51 | { | 51 | { |
52 | dp = (unsigned char *)((unsigned int)target + (len & (32 - 1))); | 52 | dp = (unsigned char *)((unsigned int)target + (len & (32 - 1))); |
53 | for(d = 0;d < (len % 32); d++) | 53 | for(d = 0;d < (len % 32); d++) |
54 | *dp++ = c; | 54 | *dp++ = c; |
55 | 55 | ||
56 | } | 56 | } |
57 | } | 57 | } |
58 | } | 58 | } |
59 | 59 | ||
60 | void memset16(void *target, unsigned short c, size_t len) | 60 | void memset16(void *target, unsigned short c, size_t len) |
@@ -62,14 +62,14 @@ void memset16(void *target, unsigned short c, size_t len) | |||
62 | int ch = DMA_CHANNEL; | 62 | int ch = DMA_CHANNEL; |
63 | unsigned short d; | 63 | unsigned short d; |
64 | unsigned short *dp; | 64 | unsigned short *dp; |
65 | 65 | ||
66 | if(len < 32) | 66 | if(len < 32) |
67 | _memset16(target,c,len); | 67 | _memset16(target,c,len); |
68 | else | 68 | else |
69 | { | 69 | { |
70 | if(((unsigned int)target < 0xa0000000) && len) | 70 | if(((unsigned int)target < 0xa0000000) && len) |
71 | dma_cache_wback_inv((unsigned long)target, len); | 71 | dma_cache_wback_inv((unsigned long)target, len); |
72 | 72 | ||
73 | d = c; | 73 | d = c; |
74 | REG_DMAC_DSAR(ch) = PHYSADDR((unsigned long)&d); | 74 | REG_DMAC_DSAR(ch) = PHYSADDR((unsigned long)&d); |
75 | REG_DMAC_DTAR(ch) = PHYSADDR((unsigned long)target); | 75 | REG_DMAC_DTAR(ch) = PHYSADDR((unsigned long)target); |
@@ -77,7 +77,7 @@ void memset16(void *target, unsigned short c, size_t len) | |||
77 | REG_DMAC_DRSR(ch) = DMAC_DRSR_RS_AUTO; | 77 | REG_DMAC_DRSR(ch) = DMAC_DRSR_RS_AUTO; |
78 | REG_DMAC_DCMD(ch) = DMAC_DCMD_DAI | DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | DMAC_DCMD_DS_32BYTE; | 78 | REG_DMAC_DCMD(ch) = DMAC_DCMD_DAI | DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | DMAC_DCMD_DS_32BYTE; |
79 | REG_DMAC_DCCSR(ch) = DMAC_DCCSR_EN | DMAC_DCCSR_NDES; | 79 | REG_DMAC_DCCSR(ch) = DMAC_DCCSR_EN | DMAC_DCCSR_NDES; |
80 | 80 | ||
81 | while (REG_DMAC_DTCR(ch)); | 81 | while (REG_DMAC_DTCR(ch)); |
82 | if(len % 32) | 82 | if(len % 32) |
83 | { | 83 | { |
@@ -85,29 +85,29 @@ void memset16(void *target, unsigned short c, size_t len) | |||
85 | for(d = 0; d < (len % 32); d++) | 85 | for(d = 0; d < (len % 32); d++) |
86 | *dp++ = c; | 86 | *dp++ = c; |
87 | } | 87 | } |
88 | } | 88 | } |
89 | } | 89 | } |
90 | 90 | ||
91 | void memcpy(void *target, const void *source, size_t len) | 91 | void memcpy(void *target, const void *source, size_t len) |
92 | { | 92 | { |
93 | int ch = DMA_CHANNEL; | 93 | int ch = DMA_CHANNEL; |
94 | unsigned char *dp; | 94 | unsigned char *dp; |
95 | 95 | ||
96 | if(len < 4) | 96 | if(len < 4) |
97 | _memcpy(target, source, len); | 97 | _memcpy(target, source, len); |
98 | 98 | ||
99 | if(((unsigned int)source < 0xa0000000) && len) | 99 | if(((unsigned int)source < 0xa0000000) && len) |
100 | dma_cache_wback_inv((unsigned long)source, len); | 100 | dma_cache_wback_inv((unsigned long)source, len); |
101 | 101 | ||
102 | if(((unsigned int)target < 0xa0000000) && len) | 102 | if(((unsigned int)target < 0xa0000000) && len) |
103 | dma_cache_wback_inv((unsigned long)target, len); | 103 | dma_cache_wback_inv((unsigned long)target, len); |
104 | 104 | ||
105 | REG_DMAC_DSAR(ch) = PHYSADDR((unsigned long)source); | 105 | REG_DMAC_DSAR(ch) = PHYSADDR((unsigned long)source); |
106 | REG_DMAC_DTAR(ch) = PHYSADDR((unsigned long)target); | 106 | REG_DMAC_DTAR(ch) = PHYSADDR((unsigned long)target); |
107 | REG_DMAC_DTCR(ch) = len / 4; | 107 | REG_DMAC_DTCR(ch) = len / 4; |
108 | REG_DMAC_DRSR(ch) = DMAC_DRSR_RS_AUTO; | 108 | REG_DMAC_DRSR(ch) = DMAC_DRSR_RS_AUTO; |
109 | REG_DMAC_DCMD(ch) = DMAC_DCMD_DAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | DMAC_DCMD_DS_32BIT; | 109 | REG_DMAC_DCMD(ch) = DMAC_DCMD_DAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | DMAC_DCMD_DS_32BIT; |
110 | 110 | ||
111 | REG_DMAC_DCCSR(ch) = DMAC_DCCSR_EN | DMAC_DCCSR_NDES; | 111 | REG_DMAC_DCCSR(ch) = DMAC_DCCSR_EN | DMAC_DCCSR_NDES; |
112 | while (REG_DMAC_DTCR(ch)); | 112 | while (REG_DMAC_DTCR(ch)); |
113 | if(len % 4) | 113 | if(len % 4) |