diff options
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/codec-jz4760.c')
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/codec-jz4760.c | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c b/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c index a2de80a914..7e210e21f9 100644 --- a/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c +++ b/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c | |||
@@ -192,80 +192,85 @@ void audiohw_set_filter_roll_off(int value) | |||
192 | } | 192 | } |
193 | 193 | ||
194 | void pll1_init(unsigned int freq); | 194 | void pll1_init(unsigned int freq); |
195 | void pll1_disable(void); | ||
196 | |||
195 | void audiohw_set_frequency(int fsel) | 197 | void audiohw_set_frequency(int fsel) |
196 | { | 198 | { |
197 | unsigned int pll1_speed; | 199 | unsigned int pll1_speed; |
198 | unsigned char mclk_div, bclk_div, func_mode; | 200 | unsigned char mclk_div, bclk_div, func_mode; |
199 | 201 | ||
202 | // bclk is 1..8 | ||
203 | // mclk is 1..512 | ||
204 | |||
200 | switch(fsel) | 205 | switch(fsel) |
201 | { | 206 | { |
202 | case HW_FREQ_8: | 207 | case HW_FREQ_8: // 0.512 MHz |
203 | pll1_speed = 426000000; | 208 | pll1_speed = 426000000; |
204 | mclk_div = 52; | 209 | mclk_div = 52; |
205 | bclk_div = 16; | 210 | bclk_div = 16; |
206 | func_mode = 0; | 211 | func_mode = 0; |
207 | break; | 212 | break; |
208 | case HW_FREQ_11: | 213 | case HW_FREQ_11: // 0.7056 MHz |
209 | pll1_speed = 508000000; | 214 | pll1_speed = 508000000; |
210 | mclk_div = 45; | 215 | mclk_div = 45; |
211 | bclk_div = 16; | 216 | bclk_div = 16; |
212 | func_mode = 0; | 217 | func_mode = 0; |
213 | break; | 218 | break; |
214 | case HW_FREQ_12: | 219 | case HW_FREQ_12: // 0.768 MHz |
215 | pll1_speed = 516000000; | 220 | pll1_speed = 516000000; |
216 | mclk_div = 42; | 221 | mclk_div = 42; |
217 | bclk_div = 16; | 222 | bclk_div = 16; |
218 | func_mode = 0; | 223 | func_mode = 0; |
219 | break; | 224 | break; |
220 | case HW_FREQ_16: | 225 | case HW_FREQ_16: // 1.024 MHz |
221 | pll1_speed = 426000000; | 226 | pll1_speed = 426000000; |
222 | mclk_div = 52; | 227 | mclk_div = 52; |
223 | bclk_div = 8; | 228 | bclk_div = 8; |
224 | func_mode = 0; | 229 | func_mode = 0; |
225 | break; | 230 | break; |
226 | case HW_FREQ_22: | 231 | case HW_FREQ_22: // 1.4112 MHz |
227 | pll1_speed = 508000000; | 232 | pll1_speed = 508000000; |
228 | mclk_div = 45; | 233 | mclk_div = 45; |
229 | bclk_div = 8; | 234 | bclk_div = 8; |
230 | func_mode = 0; | 235 | func_mode = 0; |
231 | break; | 236 | break; |
232 | case HW_FREQ_24: | 237 | case HW_FREQ_24: // 1.536 MHz |
233 | pll1_speed = 516000000; | 238 | pll1_speed = 516000000; |
234 | mclk_div = 42; | 239 | mclk_div = 42; |
235 | bclk_div = 8; | 240 | bclk_div = 8; |
236 | func_mode = 0; | 241 | func_mode = 0; |
237 | break; | 242 | break; |
238 | case HW_FREQ_32: | 243 | case HW_FREQ_32: // 2.048 MHz |
239 | pll1_speed = 426000000; | 244 | pll1_speed = 426000000; |
240 | mclk_div = 52; | 245 | mclk_div = 52; |
241 | bclk_div = 4; | 246 | bclk_div = 4; |
242 | func_mode = 0; | 247 | func_mode = 0; |
243 | break; | 248 | break; |
244 | case HW_FREQ_44: | 249 | case HW_FREQ_44: // 2.8224 MHz |
245 | pll1_speed = 508000000; | 250 | pll1_speed = 508000000; |
246 | mclk_div = 45; | 251 | mclk_div = 45; |
247 | bclk_div = 4; | 252 | bclk_div = 4; |
248 | func_mode = 0; | 253 | func_mode = 0; |
249 | break; | 254 | break; |
250 | case HW_FREQ_48: | 255 | case HW_FREQ_48: // 3.072 MHz |
251 | pll1_speed = 516000000; | 256 | pll1_speed = 516000000; |
252 | mclk_div = 42; | 257 | mclk_div = 42; |
253 | bclk_div = 4; | 258 | bclk_div = 4; |
254 | func_mode = 0; | 259 | func_mode = 0; |
255 | break; | 260 | break; |
256 | case HW_FREQ_64: | 261 | case HW_FREQ_64: // 4.096 MHz |
257 | pll1_speed = 426000000; | 262 | pll1_speed = 426000000; |
258 | mclk_div = 52; | 263 | mclk_div = 52; |
259 | bclk_div = 2; | 264 | bclk_div = 2; |
260 | func_mode = 1; | 265 | func_mode = 1; |
261 | break; | 266 | break; |
262 | case HW_FREQ_88: | 267 | case HW_FREQ_88: // 5.6448 MHz |
263 | pll1_speed = 508000000; | 268 | pll1_speed = 508000000; |
264 | mclk_div = 45; | 269 | mclk_div = 45; |
265 | bclk_div = 2; | 270 | bclk_div = 2; |
266 | func_mode = 1; | 271 | func_mode = 1; |
267 | break; | 272 | break; |
268 | case HW_FREQ_96: | 273 | case HW_FREQ_96: // 6.144 MHz |
269 | pll1_speed = 516000000; | 274 | pll1_speed = 516000000; |
270 | mclk_div = 42; | 275 | mclk_div = 42; |
271 | bclk_div = 2; | 276 | bclk_div = 2; |
@@ -314,6 +319,7 @@ void audiohw_close(void) | |||
314 | dac_enable(0); | 319 | dac_enable(0); |
315 | __i2s_disable(); | 320 | __i2s_disable(); |
316 | __cpm_stop_aic(); | 321 | __cpm_stop_aic(); |
322 | pll1_disable(); | ||
317 | sleep(HZ); | 323 | sleep(HZ); |
318 | pop_ctrl(1); | 324 | pop_ctrl(1); |
319 | } | 325 | } |