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Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/codec-jz4740.c')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/codec-jz4740.c93
1 files changed, 48 insertions, 45 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
index 44d291f312..6a0b6ae340 100644
--- a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
@@ -26,7 +26,7 @@
26 26
27/* TODO */ 27/* TODO */
28const struct sound_settings_info audiohw_settings[] = { 28const struct sound_settings_info audiohw_settings[] = {
29 [SOUND_VOLUME] = {"dB", 0, 1, -73, 6, -20}, 29 [SOUND_VOLUME] = {"dB", 0, 2, 0, 6, 0},
30 /* HAVE_SW_TONE_CONTROLS */ 30 /* HAVE_SW_TONE_CONTROLS */
31 [SOUND_BASS] = {"dB", 0, 1, -24, 24, 0}, 31 [SOUND_BASS] = {"dB", 0, 1, -24, 24, 0},
32 [SOUND_TREBLE] = {"dB", 0, 1, -24, 24, 0}, 32 [SOUND_TREBLE] = {"dB", 0, 1, -24, 24, 0},
@@ -62,40 +62,39 @@ static void i2s_codec_init(void)
62{ 62{
63 __cpm_start_aic1(); 63 __cpm_start_aic1();
64 __cpm_start_aic2(); 64 __cpm_start_aic2();
65 65
66 __aic_enable(); 66 __aic_enable();
67 67
68 __i2s_internal_codec(); 68 __i2s_internal_codec();
69 __i2s_as_slave(); 69 __i2s_as_slave();
70 __i2s_select_i2s(); 70 __i2s_select_i2s();
71 __aic_select_i2s(); 71 __aic_select_i2s();
72 72
73 __aic_disable_byteswap(); 73 __aic_disable_byteswap();
74 __aic_disable_unsignadj(); 74 __aic_disable_unsignadj();
75 __aic_disable_mono2stereo(); 75 __aic_disable_mono2stereo();
76 76
77 i2s_codec_reset(); 77 i2s_codec_reset();
78 78
79 //REG_ICDC_CDCCR2 = (ICDC_CDCCR2_AINVOL(ICDC_CDCCR2_AINVOL_DB(0)) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48) 79 REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_SUSPD | ICDC_CDCCR1_RST);
80
80 REG_ICDC_CDCCR2 = ( ICDC_CDCCR2_AINVOL(14) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_44) 81 REG_ICDC_CDCCR2 = ( ICDC_CDCCR2_AINVOL(14) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_44)
81 | ICDC_CDCCR2_HPVOL(ICDC_CDCCR2_HPVOL_0)); 82 | ICDC_CDCCR2_HPVOL(ICDC_CDCCR2_HPVOL_0));
82
83 REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_SUSPD | ICDC_CDCCR1_RST);
84 83
85 mdelay(15); 84 mdelay(15);
86 REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_PDVR | ICDC_CDCCR1_VRCGL | ICDC_CDCCR1_VRCGH); 85 REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_PDVR | ICDC_CDCCR1_VRCGL | ICDC_CDCCR1_VRCGH);
87 REG_ICDC_CDCCR1 |= (ICDC_CDCCR1_EDAC | ICDC_CDCCR1_HPCG); 86 REG_ICDC_CDCCR1 |= (ICDC_CDCCR1_EDAC | ICDC_CDCCR1_HPCG);
88 87
89 mdelay(600); 88 mdelay(600);
90 REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_HPCG | ICDC_CDCCR1_PDHPM | ICDC_CDCCR1_PDHP); 89 REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_HPCG | ICDC_CDCCR1_PDHPM | ICDC_CDCCR1_PDHP);
91 90
92 mdelay(2); 91 mdelay(2);
93 92
94 /* CDCCR1.ELININ=0, CDCCR1.EMIC=0, CDCCR1.EADC=0, CDCCR1.SW1ON=0, CDCCR1.EDAC=1, CDCCR1.SW2ON=1, CDCCR1.HPMUTE=0 */ 93 /* CDCCR1.ELININ=0, CDCCR1.EMIC=0, CDCCR1.EADC=0, CDCCR1.SW1ON=0, CDCCR1.EDAC=1, CDCCR1.SW2ON=1, CDCCR1.HPMUTE=0 */
95 REG_ICDC_CDCCR1 = (REG_ICDC_CDCCR1 & ~(ICDC_CDCCR1_ELININ | ICDC_CDCCR1_EMIC | ICDC_CDCCR1_EADC | 94 REG_ICDC_CDCCR1 = (REG_ICDC_CDCCR1 & ~(ICDC_CDCCR1_ELININ | ICDC_CDCCR1_EMIC | ICDC_CDCCR1_EADC |
96 ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_HPMUTE)) | (ICDC_CDCCR1_EDAC 95 ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_HPMUTE)) | (ICDC_CDCCR1_EDAC
97 | ICDC_CDCCR1_SW2ON); 96 | ICDC_CDCCR1_SW2ON);
98 97
99 HP_on_off_flag = 1; /* HP is on */ 98 HP_on_off_flag = 1; /* HP is on */
100} 99}
101 100
@@ -111,7 +110,7 @@ static void i2s_codec_set_mic(unsigned short v) /* 0 <= v <= 100 */
111 REG_ICDC_CDCCR2 = ((REG_ICDC_CDCCR2 & ~(0x1f << 16)) | (codec_mic_gain << 16)); 110 REG_ICDC_CDCCR2 = ((REG_ICDC_CDCCR2 & ~(0x1f << 16)) | (codec_mic_gain << 16));
112} 111}
113 112
114static void i2s_codec_set_bass(unsigned short v) /* 0 <= v <= 100 */ 113static void i2s_codec_set_base(unsigned short v) /* 0 <= v <= 100 */
115{ 114{
116 v &= 0xff; 115 v &= 0xff;
117 116
@@ -200,6 +199,7 @@ static unsigned short i2s_codec_get_volume(void)
200 return val; 199 return val;
201} 200}
202 201
202static unsigned long HP_register_value;
203static void HP_turn_on(void) 203static void HP_turn_on(void)
204{ 204{
205 //see 1.3.4.1 205 //see 1.3.4.1
@@ -261,11 +261,41 @@ static void HP_turn_off(void)
261} 261}
262#endif 262#endif
263 263
264static void i2s_codec_set_samplerate(unsigned int rate) 264void audiohw_mute(bool mute)
265{
266 if(mute)
267 REG_ICDC_CDCCR1 |= ICDC_CDCCR1_HPMUTE;
268 else
269 REG_ICDC_CDCCR1 &= ~ICDC_CDCCR1_HPMUTE;
270}
271
272void audiohw_preinit(void)
273{
274}
275
276void audiohw_postinit(void)
277{
278 audiohw_mute(false);
279 //HP_turn_on();
280}
281
282void audiohw_init(void)
283{
284 i2s_codec_init();
285}
286
287void audiohw_set_volume(int v)
288{
289 /* 0 <= v <= 60 */
290 unsigned int codec_volume = v / 20;
291 REG_ICDC_CDCCR2 = (REG_ICDC_CDCCR2 & ~ICDC_CDCCR2_HPVOL(0x3)) | ICDC_CDCCR2_HPVOL(codec_volume);
292}
293
294void audiohw_set_frequency(int freq)
265{ 295{
266 unsigned int speed; 296 unsigned int speed;
267 297
268 switch (rate) 298 switch(freq)
269 { 299 {
270 case 8000: 300 case 8000:
271 speed = ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_8); 301 speed = ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_8);
@@ -297,33 +327,6 @@ static void i2s_codec_set_samplerate(unsigned int rate)
297 default: 327 default:
298 return; 328 return;
299 } 329 }
300 REG_ICDC_CDCCR2 &= ~ICDC_CDCCR2_SMPR(0xF);
301 REG_ICDC_CDCCR2 |= speed;
302}
303 330
304void audiohw_mute(bool mute) 331 REG_ICDC_CDCCR2 = (REG_ICDC_CDCCR2 & ~ICDC_CDCCR2_SMPR(0xF)) | speed;
305{
306 if(mute)
307 REG_ICDC_CDCCR1 |= ICDC_CDCCR1_HPMUTE;
308 else
309 REG_ICDC_CDCCR1 &= ~ICDC_CDCCR1_HPMUTE;
310}
311
312void audiohw_preinit(void)
313{
314}
315
316void audiohw_postinit(void)
317{
318 audiohw_mute(false);
319}
320
321void audiohw_init(void)
322{
323 i2s_codec_init();
324}
325
326void audiohw_set_frequency(int freq)
327{
328 i2s_codec_set_samplerate(freq);
329} 332}