diff options
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/boot.lds')
-rwxr-xr-x | firmware/target/mips/ingenic_jz47xx/boot.lds | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/boot.lds b/firmware/target/mips/ingenic_jz47xx/boot.lds new file mode 100755 index 0000000000..9bc635afad --- /dev/null +++ b/firmware/target/mips/ingenic_jz47xx/boot.lds | |||
@@ -0,0 +1,107 @@ | |||
1 | #include "config.h" | ||
2 | #undef mips | ||
3 | |||
4 | OUTPUT_FORMAT("elf32-tradlittlemips") | ||
5 | OUTPUT_ARCH(MIPS) | ||
6 | ENTRY(_start) | ||
7 | STARTUP(target/mips/ingenic_jz47xx/crt0.o) | ||
8 | |||
9 | #define DRAMSIZE (MEMORYSIZE * 0x100000) | ||
10 | |||
11 | #define DRAMORIG 0x80E00000 /* HACK */ | ||
12 | #define IRAMORIG 0x80000000 | ||
13 | #define IRAMSIZE 16K | ||
14 | |||
15 | MEMORY | ||
16 | { | ||
17 | DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE | ||
18 | IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE | ||
19 | } | ||
20 | |||
21 | SECTIONS | ||
22 | { | ||
23 | . = DRAMORIG; | ||
24 | |||
25 | .text : { | ||
26 | loadaddress = .; | ||
27 | _loadaddress = .; | ||
28 | *(.init.text); | ||
29 | *(.text*); | ||
30 | *(.glue_7); | ||
31 | *(.glue_7t); | ||
32 | . = ALIGN(0x4); | ||
33 | } > DRAM | ||
34 | |||
35 | . = ALIGN(4); | ||
36 | |||
37 | .rodata : | ||
38 | { | ||
39 | *(.rodata); /* problems without this, dunno why */ | ||
40 | *(.rodata*); | ||
41 | *(.rodata.str1.1); | ||
42 | *(.rodata.str1.4); | ||
43 | . = ALIGN(0x4); | ||
44 | |||
45 | /* Pseudo-allocate the copies of the data sections */ | ||
46 | _datacopy = .; | ||
47 | } > DRAM | ||
48 | |||
49 | . = ALIGN(4); | ||
50 | |||
51 | .data : { | ||
52 | *(.icode); | ||
53 | *(.irodata); | ||
54 | *(.idata); | ||
55 | *(.data*); | ||
56 | *(.scommon*); | ||
57 | *(.sdata*); | ||
58 | . = ALIGN(0x4); | ||
59 | _dataend = . ; | ||
60 | } > DRAM | ||
61 | |||
62 | . = ALIGN(4); | ||
63 | |||
64 | _gp = ALIGN(16); | ||
65 | .got : { | ||
66 | *(.got*) | ||
67 | }> DRAM | ||
68 | |||
69 | . = ALIGN(4); | ||
70 | |||
71 | .stack : | ||
72 | { | ||
73 | *(.stack) | ||
74 | _stackbegin = .; | ||
75 | stackbegin = .; | ||
76 | . += 0x2000; | ||
77 | _stackend = .; | ||
78 | stackend = .; | ||
79 | } > DRAM | ||
80 | |||
81 | . = ALIGN(4); | ||
82 | |||
83 | .bss : | ||
84 | { | ||
85 | _edata = .; | ||
86 | *(.sbss*); | ||
87 | *(.bss*); | ||
88 | *(.ibss); | ||
89 | *(COMMON) | ||
90 | _end = .; | ||
91 | } > DRAM | ||
92 | |||
93 | . = ALIGN(4); | ||
94 | |||
95 | .vectors IRAMORIG : | ||
96 | { | ||
97 | _vectorsstart = .; | ||
98 | KEEP(*(.resetvectors)); | ||
99 | *(.resetvectors); | ||
100 | KEEP(*(.vectors)); | ||
101 | *(.vectors); | ||
102 | _vectorsend = .; | ||
103 | } AT > DRAM | ||
104 | _vectorscopy = LOADADDR(.vectors); | ||
105 | |||
106 | . = ALIGN(4); | ||
107 | } | ||