diff options
Diffstat (limited to 'firmware/target/arm')
| -rwxr-xr-x | firmware/target/arm/memset16-arm.S | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/firmware/target/arm/memset16-arm.S b/firmware/target/arm/memset16-arm.S new file mode 100755 index 0000000000..13213c57f0 --- /dev/null +++ b/firmware/target/arm/memset16-arm.S | |||
| @@ -0,0 +1,80 @@ | |||
| 1 | /*************************************************************************** | ||
| 2 | * __________ __ ___. | ||
| 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
| 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
| 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
| 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
| 7 | * \/ \/ \/ \/ \/ | ||
| 8 | * $Id$ | ||
| 9 | * | ||
| 10 | * Copyright (C) 2006 by Thom Johansen | ||
| 11 | * | ||
| 12 | * All files in this archive are subject to the GNU General Public License. | ||
| 13 | * See the file COPYING in the source tree root for full license agreement. | ||
| 14 | * | ||
| 15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
| 16 | * KIND, either express or implied. | ||
| 17 | * | ||
| 18 | ****************************************************************************/ | ||
| 19 | #include "config.h" | ||
| 20 | |||
| 21 | .section .icode,"ax",%progbits | ||
| 22 | |||
| 23 | .align 2 | ||
| 24 | |||
| 25 | /* The following code is based on code from the Linux kernel version 2.6.15.3, | ||
| 26 | * linux/arch/arm/lib/memset.S | ||
| 27 | * | ||
| 28 | * Copyright (C) 1995-2000 Russell King | ||
| 29 | */ | ||
| 30 | |||
| 31 | .global memset16 | ||
| 32 | .type memset16,%function | ||
| 33 | memset16: | ||
| 34 | tst r0, #2 @ unaligned? | ||
| 35 | cmpne r2, #0 | ||
| 36 | strneh r1, [r0], #2 @ store one halfword to align | ||
| 37 | subne r2, r2, #1 | ||
| 38 | |||
| 39 | /* | ||
| 40 | * we know that the pointer in r0 is aligned to a word boundary. | ||
| 41 | */ | ||
| 42 | orr r1, r1, r1, lsl #16 | ||
| 43 | mov r3, r1 | ||
| 44 | cmp r2, #8 | ||
| 45 | blt 4f | ||
| 46 | /* | ||
| 47 | * We need an extra register for this loop - save the return address and | ||
| 48 | * use the LR | ||
| 49 | */ | ||
| 50 | str lr, [sp, #-4]! | ||
| 51 | mov ip, r1 | ||
| 52 | mov lr, r1 | ||
| 53 | |||
| 54 | 2: subs r2, r2, #32 | ||
| 55 | stmgeia r0!, {r1, r3, ip, lr} @ 64 bytes at a time. | ||
| 56 | stmgeia r0!, {r1, r3, ip, lr} | ||
| 57 | stmgeia r0!, {r1, r3, ip, lr} | ||
| 58 | stmgeia r0!, {r1, r3, ip, lr} | ||
| 59 | bgt 2b | ||
| 60 | ldmeqfd sp!, {pc} @ Now <64 bytes to go. | ||
| 61 | /* | ||
| 62 | * No need to correct the count; we're only testing bits from now on | ||
| 63 | */ | ||
| 64 | tst r2, #16 | ||
| 65 | stmneia r0!, {r1, r3, ip, lr} | ||
| 66 | stmneia r0!, {r1, r3, ip, lr} | ||
| 67 | tst r2, #8 | ||
| 68 | stmneia r0!, {r1, r3, ip, lr} | ||
| 69 | ldr lr, [sp], #4 | ||
| 70 | |||
| 71 | 4: tst r2, #4 | ||
| 72 | stmneia r0!, {r1, r3} | ||
| 73 | tst r2, #2 | ||
| 74 | strne r1, [r0], #4 | ||
| 75 | |||
| 76 | tst r2, #1 | ||
| 77 | strneh r1, [r0], #2 | ||
| 78 | bx lr | ||
| 79 | .end: | ||
| 80 | .size memset16,.end-memset16 | ||