diff options
Diffstat (limited to 'firmware/target/arm/tms320dm320/timer-dm320.c')
-rw-r--r-- | firmware/target/arm/tms320dm320/timer-dm320.c | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/firmware/target/arm/tms320dm320/timer-dm320.c b/firmware/target/arm/tms320dm320/timer-dm320.c index 7895005d46..52b433fac5 100644 --- a/firmware/target/arm/tms320dm320/timer-dm320.c +++ b/firmware/target/arm/tms320dm320/timer-dm320.c | |||
@@ -24,12 +24,12 @@ | |||
24 | #include "logf.h" | 24 | #include "logf.h" |
25 | 25 | ||
26 | /* GPB0/TOUT0 should already have been configured as output so that pin | 26 | /* GPB0/TOUT0 should already have been configured as output so that pin |
27 | should not be a functional pin and TIMER0 output unseen there */ | 27 | should not be a functional pin and TIMER0 output unseen there */ |
28 | void TIMER0(void) | 28 | void TIMER0(void) |
29 | { | 29 | { |
30 | if (pfn_timer != NULL) | 30 | if (pfn_timer != NULL) |
31 | pfn_timer(); | 31 | pfn_timer(); |
32 | IO_INTC_IRQ0 |= 1<<IRQ_TIMER0; | 32 | IO_INTC_IRQ0 = INTR_IRQ0_TMR0; //clear TIMER0 interrupt |
33 | } | 33 | } |
34 | 34 | ||
35 | bool __timer_set(long cycles, bool start) | 35 | bool __timer_set(long cycles, bool start) |
@@ -40,6 +40,10 @@ bool __timer_set(long cycles, bool start) | |||
40 | if(cycles<1) | 40 | if(cycles<1) |
41 | return false; | 41 | return false; |
42 | 42 | ||
43 | oldlevel = set_irq_level(HIGHEST_IRQ_LEVEL); | ||
44 | |||
45 | IO_CLK_MOD2 |= CLK_MOD2_TMR0; //enable TIMER0 clock!!!!!!!!! | ||
46 | |||
43 | IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP; | 47 | IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP; |
44 | 48 | ||
45 | if (start && pfn_unregister != NULL) | 49 | if (start && pfn_unregister != NULL) |
@@ -67,23 +71,27 @@ bool __timer_set(long cycles, bool start) | |||
67 | 71 | ||
68 | static void stop_timer(void) | 72 | static void stop_timer(void) |
69 | { | 73 | { |
70 | IO_INTC_EINT0 &= ~(1<<IRQ_TIMER0); | 74 | IO_INTC_EINT0 &= ~INTR_EINT0_TMR0; //disable TIMER0 interrupt |
71 | 75 | ||
72 | IO_INTC_IRQ0 |= 1<<IRQ_TIMER0; | 76 | IO_INTC_IRQ0 = INTR_IRQ0_TMR0; //clear TIMER0 interrupt |
73 | 77 | ||
74 | IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP; | 78 | IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP; |
79 | |||
80 | IO_CLK_MOD2 &= ~CLK_MOD2_TMR0; //disable TIMER0 clock | ||
75 | } | 81 | } |
76 | 82 | ||
77 | bool __timer_register(void) | 83 | bool __timer_register(void) |
78 | { | 84 | { |
79 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); | 85 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); |
80 | 86 | ||
81 | stop_timer(); | 87 | stop_timer(); |
88 | |||
89 | IO_CLK_MOD2 |= CLK_MOD2_TMR0; //enable TIMER0 clock!!!!!!!!! | ||
82 | 90 | ||
83 | /* Turn Timer0 to Free Run mode */ | 91 | /* Turn Timer0 to Free Run mode */ |
84 | IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_FREE_RUN; | 92 | IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_FREE_RUN; |
85 | 93 | ||
86 | IO_INTC_EINT0 |= 1<<IRQ_TIMER0; | 94 | IO_INTC_EINT0 |= INTR_EINT0_TMR0; //enable TIMER0 interrupt |
87 | 95 | ||
88 | restore_interrupt(oldstatus); | 96 | restore_interrupt(oldstatus); |
89 | 97 | ||