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Diffstat (limited to 'firmware/target/arm/tms320dm320/system-dm320.c')
-rw-r--r--firmware/target/arm/tms320dm320/system-dm320.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/firmware/target/arm/tms320dm320/system-dm320.c b/firmware/target/arm/tms320dm320/system-dm320.c
index 8a50ba7f08..f3f8dcea26 100644
--- a/firmware/target/arm/tms320dm320/system-dm320.c
+++ b/firmware/target/arm/tms320dm320/system-dm320.c
@@ -16,7 +16,8 @@
16 * KIND, either express or implied. 16 * KIND, either express or implied.
17 * 17 *
18 ****************************************************************************/ 18 ****************************************************************************/
19 19#include "cpu.h"
20#include "mmu-arm.h"
20#include "kernel.h" 21#include "kernel.h"
21#include "system.h" 22#include "system.h"
22#include "panic.h" 23#include "panic.h"
@@ -26,6 +27,9 @@
26#define default_interrupt(name) \ 27#define default_interrupt(name) \
27 extern __attribute__((weak,alias("UIRQ"))) void name (void) 28 extern __attribute__((weak,alias("UIRQ"))) void name (void)
28 29
30void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
31void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked));
32
29default_interrupt(TIMER0); 33default_interrupt(TIMER0);
30default_interrupt(TIMER1); 34default_interrupt(TIMER1);
31default_interrupt(TIMER2); 35default_interrupt(TIMER2);
@@ -101,7 +105,6 @@ static void UIRQ(void)
101 panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]); 105 panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]);
102} 106}
103 107
104void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
105void irq_handler(void) 108void irq_handler(void)
106{ 109{
107 /* 110 /*
@@ -116,7 +119,6 @@ void irq_handler(void)
116 "subs pc, lr, #4 \n"); /* Return from FIQ */ 119 "subs pc, lr, #4 \n"); /* Return from FIQ */
117} 120}
118 121
119void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked));
120void fiq_handler(void) 122void fiq_handler(void)
121{ 123{
122 /* 124 /*
@@ -179,6 +181,13 @@ void system_init(void)
179 enable_interrupts(); 181 enable_interrupts();
180 uart_init(); 182 uart_init();
181 spi_init(); 183 spi_init();
184
185 /* MMU initialization (Starts data and instruction cache) */
186 ttb_init();
187 map_section(0, 0, 0x1000, CACHE_NONE); /* Make sure everything is mapped on itself */
188 map_section(0x00900000, 0x00900000, 64, CACHE_ALL); /* Enable caching for RAM */
189 map_section((int)FRAME, (int)FRAME, 2, BUFFERED); /* enable buffered writing for the framebuffer */
190 enable_mmu();
182} 191}
183 192
184int system_memory_guard(int newmode) 193int system_memory_guard(int newmode)