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Diffstat (limited to 'firmware/target/arm/tms320dm320/spi-dm320.c')
-rw-r--r--firmware/target/arm/tms320dm320/spi-dm320.c23
1 files changed, 16 insertions, 7 deletions
diff --git a/firmware/target/arm/tms320dm320/spi-dm320.c b/firmware/target/arm/tms320dm320/spi-dm320.c
index d8f338f592..a7b4fc678e 100644
--- a/firmware/target/arm/tms320dm320/spi-dm320.c
+++ b/firmware/target/arm/tms320dm320/spi-dm320.c
@@ -31,6 +31,7 @@
31#define GIO_TS_ENABLE (1<<2) 31#define GIO_TS_ENABLE (1<<2)
32#define GIO_RTC_ENABLE (1<<12) 32#define GIO_RTC_ENABLE (1<<12)
33#define GIO_BL_ENABLE (1<<13) 33#define GIO_BL_ENABLE (1<<13)
34#define GIO_LCD_ENABLE (1<<5)
34 35
35struct mutex spi_mtx; 36struct mutex spi_mtx;
36 37
@@ -39,14 +40,21 @@ struct SPI_info {
39 volatile unsigned short *clrreg; 40 volatile unsigned short *clrreg;
40 int bit; 41 int bit;
41}; 42};
42#define reg(a) ((volatile unsigned short *)(PHY_IO_BASE+a)) 43
43struct SPI_info spi_targets[] = 44struct SPI_info spi_targets[] =
44{ 45{
46#ifndef CREATIVE_ZVM
45 [SPI_target_TSC2100] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_TS_ENABLE }, 47 [SPI_target_TSC2100] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_TS_ENABLE },
46 [SPI_target_RX5X348AB] = { &IO_GIO_BITSET0, &IO_GIO_BITCLR0, GIO_RTC_ENABLE }, 48 [SPI_target_RX5X348AB] = { &IO_GIO_BITSET0, &IO_GIO_BITCLR0, GIO_RTC_ENABLE},
47 [SPI_target_BACKLIGHT] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_BL_ENABLE }, 49 [SPI_target_BACKLIGHT] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_BL_ENABLE },
50#else
51 [SPI_target_LTV250QV] = { &IO_GIO_BITCLR2, &IO_GIO_BITSET2, GIO_LCD_ENABLE},
52#endif
48}; 53};
49 54
55#define IO_SERIAL0_XMIT (0x100)
56#define IO_SERIAL0_MODE_SCLK (1 << 10)
57
50static void spi_disable_all_targets(void) 58static void spi_disable_all_targets(void)
51{ 59{
52 int i; 60 int i;
@@ -70,7 +78,7 @@ int spi_block_transfer(enum SPI_target target,
70 IO_SERIAL0_TX_DATA = *tx_bytes++; 78 IO_SERIAL0_TX_DATA = *tx_bytes++;
71 79
72 /* Wait until transfer finished */ 80 /* Wait until transfer finished */
73 while (IO_SERIAL0_RX_DATA & 0x100); 81 while (IO_SERIAL0_RX_DATA & IO_SERIAL0_XMIT);
74 } 82 }
75 83
76 while (rx_size--) 84 while (rx_size--)
@@ -80,7 +88,7 @@ int spi_block_transfer(enum SPI_target target,
80 88
81 /* Wait until transfer finished */ 89 /* Wait until transfer finished */
82 unsigned short data; 90 unsigned short data;
83 while ((data = IO_SERIAL0_RX_DATA) & 0x100); 91 while ((data = IO_SERIAL0_RX_DATA) & IO_SERIAL0_XMIT);
84 92
85 *rx_bytes++ = data & 0xff; 93 *rx_bytes++ = data & 0xff;
86 } 94 }
@@ -95,14 +103,15 @@ void spi_init(void)
95{ 103{
96 mutex_init(&spi_mtx); 104 mutex_init(&spi_mtx);
97 /* Set SCLK idle level = 0 */ 105 /* Set SCLK idle level = 0 */
98 IO_SERIAL0_MODE |= 1<<10; 106 IO_SERIAL0_MODE |= IO_SERIAL0_MODE_SCLK;
99 /* Enable TX */ 107 /* Enable TX */
100 IO_SERIAL0_TX_ENABLE = 0x0001; 108 IO_SERIAL0_TX_ENABLE = 0x0001;
101 109#ifndef CREATIVE_ZVM
102 /* Set GIO 18 to output for touch screen slave enable */ 110 /* Set GIO 18 to output for touch screen slave enable */
103 IO_GIO_DIR1 &= ~GIO_TS_ENABLE; 111 IO_GIO_DIR1 &= ~GIO_TS_ENABLE;
104 /* Set GIO 12 to output for rtc slave enable */ 112 /* Set GIO 12 to output for rtc slave enable */
105 IO_GIO_DIR0 &= ~GIO_RTC_ENABLE; 113 IO_GIO_DIR0 &= ~GIO_RTC_ENABLE;
106 114#endif
107 spi_disable_all_targets(); /* make sure only one is ever enabled at a time */ 115 spi_disable_all_targets(); /* make sure only one is ever enabled at a time */
116
108} 117}