summaryrefslogtreecommitdiff
path: root/firmware/target/arm/tms320dm320/dsp/dma.c
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/target/arm/tms320dm320/dsp/dma.c')
-rw-r--r--firmware/target/arm/tms320dm320/dsp/dma.c466
1 files changed, 233 insertions, 233 deletions
diff --git a/firmware/target/arm/tms320dm320/dsp/dma.c b/firmware/target/arm/tms320dm320/dsp/dma.c
index 3048d294b1..6e5cb71c2b 100644
--- a/firmware/target/arm/tms320dm320/dsp/dma.c
+++ b/firmware/target/arm/tms320dm320/dsp/dma.c
@@ -1,233 +1,233 @@
1/*************************************************************************** 1/***************************************************************************
2 * __________ __ ___. 2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___ 3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / 4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < 5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ 6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/ 7 * \/ \/ \/ \/ \/
8 * $Id$ 8 * $Id$
9 * 9 *
10 * Copyright (C) 2008 by Catalin Patulea 10 * Copyright (C) 2008 by Catalin Patulea
11 * Copyright (C) 2008 by Maurus Cuelenaere 11 * Copyright (C) 2008 by Maurus Cuelenaere
12 * Copyright (C) 2009 by Karl Kurbjun 12 * Copyright (C) 2009 by Karl Kurbjun
13 * 13 *
14 * This program is free software; you can redistribute it and/or 14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License 15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 2 16 * as published by the Free Software Foundation; either version 2
17 * of the License, or (at your option) any later version. 17 * of the License, or (at your option) any later version.
18 * 18 *
19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY 19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20 * KIND, either express or implied. 20 * KIND, either express or implied.
21 * 21 *
22 ****************************************************************************/ 22 ****************************************************************************/
23 23
24#include "registers.h" 24#include "registers.h"
25#include "arm.h" 25#include "arm.h"
26#include "ipc.h" 26#include "ipc.h"
27 27
28/* Size of data buffer in words (16 bit) */ 28/* Size of data buffer in words (16 bit) */
29#define DSP_BUFFER_SIZE (0x1000) 29#define DSP_BUFFER_SIZE (0x1000)
30 30
31/* Put the "data" buffer in it's own .dma section so that it can 31/* Put the "data" buffer in it's own .dma section so that it can
32 * be handled in the linker.cmd. */ 32 * be handled in the linker.cmd. */
33#pragma DATA_SECTION (data, ".dma") 33#pragma DATA_SECTION (data, ".dma")
34 34
35/* This is the "data" buffer on the DSP side used for SARAM to McBSP (IIS) */ 35/* This is the "data" buffer on the DSP side used for SARAM to McBSP (IIS) */
36static signed short data[DSP_BUFFER_SIZE]; 36static signed short data[DSP_BUFFER_SIZE];
37 37
38/* These two describe the location of the buffer on the ARM (set in DSPHINT) */ 38/* These two describe the location of the buffer on the ARM (set in DSPHINT) */
39volatile unsigned short sdem_addrh; 39volatile unsigned short sdem_addrh;
40volatile unsigned short sdem_addrl; 40volatile unsigned short sdem_addrl;
41 41
42/* This is the size of the ARM buffer (set in DSPHINT) */ 42/* This is the size of the ARM buffer (set in DSPHINT) */
43volatile unsigned short sdem_dsp_size; 43volatile unsigned short sdem_dsp_size;
44 44
45/* These two variables keep track of the buffer level in the DSP, dsp_level, 45/* These two variables keep track of the buffer level in the DSP, dsp_level,
46 * (SARAM to McBSP) and the level on the ARM buffer (sdem_level). 46 * (SARAM to McBSP) and the level on the ARM buffer (sdem_level).
47 * sdem_level is used in the main firmware to keep track of the current 47 * sdem_level is used in the main firmware to keep track of the current
48 * playback status. dsp_level is only used in this function. */ 48 * playback status. dsp_level is only used in this function. */
49static unsigned short dsp_level; 49static unsigned short dsp_level;
50volatile unsigned short sdem_level; 50volatile unsigned short sdem_level;
51 51
52/* This is used to keep track of the last SDRAM to SARAM transfer */ 52/* This is used to keep track of the last SDRAM to SARAM transfer */
53static unsigned short last_size; 53static unsigned short last_size;
54 54
55/* This tells us which half of the DSP buffer (data) is free */ 55/* This tells us which half of the DSP buffer (data) is free */
56static unsigned short dma0_unlocked; 56static unsigned short dma0_unlocked;
57 57
58/* This is used by the ARM to flag playback status and start/stop the DMA 58/* This is used by the ARM to flag playback status and start/stop the DMA
59 * transfers. */ 59 * transfers. */
60volatile unsigned short dma0_stopped; 60volatile unsigned short dma0_stopped;
61 61
62/* This is used to effectively flag whether the ARM has new data ready or not */ 62/* This is used to effectively flag whether the ARM has new data ready or not */
63short waiting; 63short waiting;
64 64
65 65
66/* rebuffer sets up the next SDRAM to SARAM transfer and tells the ARM when DMA 66/* rebuffer sets up the next SDRAM to SARAM transfer and tells the ARM when DMA
67 * needs a new buffer. 67 * needs a new buffer.
68 * 68 *
69 * Note: The upper limit on larger buffers is the size of a short. If larger 69 * Note: The upper limit on larger buffers is the size of a short. If larger
70 * buffer sizes are needed the code on the ARM side needs to be changed to 70 * buffer sizes are needed the code on the ARM side needs to be changed to
71 * update a full long. 71 * update a full long.
72 */ 72 */
73void rebuffer(void) 73void rebuffer(void)
74{ 74{
75 unsigned long sdem_addr; 75 unsigned long sdem_addr;
76 76
77 if(dma0_stopped==1 || dma0_stopped==2) /* Stop / Pause */ 77 if(dma0_stopped==1 || dma0_stopped==2) /* Stop / Pause */
78 { 78 {
79 /* Stop MCBSP DMA0 */ 79 /* Stop MCBSP DMA0 */
80 DMPREC &= 0xFFFE; 80 DMPREC &= 0xFFFE;
81 /* Shut the transmitter down */ 81 /* Shut the transmitter down */
82 audiohw_stop(); 82 audiohw_stop();
83 83
84 /* Stop the HPIB transfer if it is running */ 84 /* Stop the HPIB transfer if it is running */
85 DMA_TRG = 0; 85 DMA_TRG = 0;
86 86
87 /* Reset the following variables for DMA restart */ 87 /* Reset the following variables for DMA restart */
88 sdem_level = 0; 88 sdem_level = 0;
89 dsp_level = 0; 89 dsp_level = 0;
90 last_size = 0; 90 last_size = 0;
91 91
92 return; 92 return;
93 } 93 }
94 94
95 /* If the sdem_level is equal to the buffer size the ARM code gave 95 /* If the sdem_level is equal to the buffer size the ARM code gave
96 * (sdem_dsp_size) then reset the size and ask the arm for another buffer 96 * (sdem_dsp_size) then reset the size and ask the arm for another buffer
97 */ 97 */
98 if(sdem_level == sdem_dsp_size) 98 if(sdem_level == sdem_dsp_size)
99 { 99 {
100 sdem_level=0; 100 sdem_level=0;
101 101
102 /* Get a new buffer (location and size) from ARM */ 102 /* Get a new buffer (location and size) from ARM */
103 status.msg = MSG_REFILL; 103 status.msg = MSG_REFILL;
104 waiting=1; 104 waiting=1;
105 105
106 /* trigger DSPHINT on the ARM */ 106 /* trigger DSPHINT on the ARM */
107 int_arm(); 107 int_arm();
108 } 108 }
109 109
110 if(!waiting) 110 if(!waiting)
111 { 111 {
112 /* Size is in bytes (but forced 32 bit transfers). Comparison is 112 /* Size is in bytes (but forced 32 bit transfers). Comparison is
113 * against DSP_BUFFER_SIZE because it is in words and this needs to 113 * against DSP_BUFFER_SIZE because it is in words and this needs to
114 * compare against half the total size in bytes. */ 114 * compare against half the total size in bytes. */
115 if( dsp_level + sdem_dsp_size - sdem_level > DSP_BUFFER_SIZE) 115 if( dsp_level + sdem_dsp_size - sdem_level > DSP_BUFFER_SIZE)
116 { 116 {
117 last_size = DSP_BUFFER_SIZE - dsp_level; 117 last_size = DSP_BUFFER_SIZE - dsp_level;
118 } 118 }
119 else 119 else
120 { 120 {
121 last_size = sdem_dsp_size - sdem_level; 121 last_size = sdem_dsp_size - sdem_level;
122 } 122 }
123 123
124 /* DSP addresses are 16 bit (word). dsp_level is in bytes so it needs to 124 /* DSP addresses are 16 bit (word). dsp_level is in bytes so it needs to
125 * be converted to words. */ 125 * be converted to words. */
126 DSP_ADDRL = (unsigned short)data + dma0_unlocked + (dsp_level >> 1); 126 DSP_ADDRL = (unsigned short)data + dma0_unlocked + (dsp_level >> 1);
127 DSP_ADDRH = 0; 127 DSP_ADDRH = 0;
128 128
129 /* SDRAM addresses are 8 bit (byte) 129 /* SDRAM addresses are 8 bit (byte)
130 * Warning: These addresses are forced to 32 bit alignment! 130 * Warning: These addresses are forced to 32 bit alignment!
131 */ 131 */
132 sdem_addr = ((unsigned long)sdem_addrh << 16 | sdem_addrl) + sdem_level; 132 sdem_addr = ((unsigned long)sdem_addrh << 16 | sdem_addrl) + sdem_level;
133 SDEM_ADDRL = sdem_addr & 0xffff; 133 SDEM_ADDRL = sdem_addr & 0xffff;
134 SDEM_ADDRH = sdem_addr >> 16; 134 SDEM_ADDRH = sdem_addr >> 16;
135 135
136 /* Set the size of the SDRAM to SARAM transfer (demac transfer) */ 136 /* Set the size of the SDRAM to SARAM transfer (demac transfer) */
137 DMA_SIZE = last_size; 137 DMA_SIZE = last_size;
138 138
139 DMA_CTRL = 0; 139 DMA_CTRL = 0;
140 140
141 /* These are just debug signals that are not used/needed right now */ 141 /* These are just debug signals that are not used/needed right now */
142 status.payload.refill._DMA_TRG = DMA_TRG; 142 status.payload.refill._DMA_TRG = DMA_TRG;
143 status.payload.refill._SDEM_ADDRH = SDEM_ADDRH; 143 status.payload.refill._SDEM_ADDRH = SDEM_ADDRH;
144 status.payload.refill._SDEM_ADDRL = SDEM_ADDRL; 144 status.payload.refill._SDEM_ADDRL = SDEM_ADDRL;
145 status.payload.refill._DSP_ADDRH = DSP_ADDRH; 145 status.payload.refill._DSP_ADDRH = DSP_ADDRH;
146 status.payload.refill._DSP_ADDRL = DSP_ADDRL; 146 status.payload.refill._DSP_ADDRL = DSP_ADDRL;
147 147
148 /* Start the demac transfer */ 148 /* Start the demac transfer */
149 DMA_TRG = 1; 149 DMA_TRG = 1;
150 } 150 }
151} 151}
152 152
153/* This interupt handler is for the SARAM (on DSP) to McBSP IIS DMA transfer. 153/* This interupt handler is for the SARAM (on DSP) to McBSP IIS DMA transfer.
154 * It interupts at 1/2 empty and empty so that we can start filling a new buffer 154 * It interupts at 1/2 empty and empty so that we can start filling a new buffer
155 * from SDRAM when a half is free. dsp_level should always be full when this 155 * from SDRAM when a half is free. dsp_level should always be full when this
156 * interupt occurs except for the initial start. */ 156 * interupt occurs except for the initial start. */
157interrupt void handle_dma0(void) 157interrupt void handle_dma0(void)
158{ 158{
159 /* Byte offset to half-buffer locked by DMA0. 159 /* Byte offset to half-buffer locked by DMA0.
160 0 for top, DSP_BUFFER_SIZE/2 for bottom */ 160 0 for top, DSP_BUFFER_SIZE/2 for bottom */
161 unsigned short dma0_locked; 161 unsigned short dma0_locked;
162 162
163 IFR = 1 << 6; 163 IFR = 1 << 6;
164 164
165 /* DMSRC0 is the beginning of the DMA0-locked SARAM half-buffer. */ 165 /* DMSRC0 is the beginning of the DMA0-locked SARAM half-buffer. */
166 DMSA = 0x00 /* DMSRC0 (banked register, see page 133 of SPRU302B */; 166 DMSA = 0x00 /* DMSRC0 (banked register, see page 133 of SPRU302B */;
167 167
168 /* Note that these address offsets (dma0_locked and dma0_unlocked are in 168 /* Note that these address offsets (dma0_locked and dma0_unlocked are in
169 * words. */ 169 * words. */
170 dma0_locked = DMSDN & (DSP_BUFFER_SIZE>>1); 170 dma0_locked = DMSDN & (DSP_BUFFER_SIZE>>1);
171 dma0_unlocked = dma0_locked ^ (DSP_BUFFER_SIZE>>1); 171 dma0_unlocked = dma0_locked ^ (DSP_BUFFER_SIZE>>1);
172 172
173 dsp_level = 0; 173 dsp_level = 0;
174 174
175 /* Start the SDRAM to SARAM copy */ 175 /* Start the SDRAM to SARAM copy */
176 rebuffer(); 176 rebuffer();
177} 177}
178 178
179/* This interupt handler runs every time a DMA transfer is complete from SDRAM 179/* This interupt handler runs every time a DMA transfer is complete from SDRAM
180 * to the SARAM buffer. It is used to update the SARAM buffer level 180 * to the SARAM buffer. It is used to update the SARAM buffer level
181 * (dsp_level), the SDRAM buffer level (sdem_level) and to rebuffer if the dsp 181 * (dsp_level), the SDRAM buffer level (sdem_level) and to rebuffer if the dsp
182 * buffer is not full. */ 182 * buffer is not full. */
183interrupt void handle_dmac(void) { 183interrupt void handle_dmac(void) {
184 IFR = 1 << 11; /* Clear interrupt */ 184 IFR = 1 << 11; /* Clear interrupt */
185 185
186 /* dsp_level and sdem_level are in bytes */ 186 /* dsp_level and sdem_level are in bytes */
187 dsp_level += last_size; 187 dsp_level += last_size;
188 sdem_level += last_size; 188 sdem_level += last_size;
189 189
190 /* compare to DSP_BUFFER_SIZE without a divide because it is in words and 190 /* compare to DSP_BUFFER_SIZE without a divide because it is in words and
191 * we want half the total size in bytes. */ 191 * we want half the total size in bytes. */
192 if(dsp_level < DSP_BUFFER_SIZE) 192 if(dsp_level < DSP_BUFFER_SIZE)
193 { 193 {
194 rebuffer(); 194 rebuffer();
195 } 195 }
196} 196}
197 197
198void dma_init(void) { 198void dma_init(void) {
199 /* Initialize some of the global variables to known values avoiding the 199 /* Initialize some of the global variables to known values avoiding the
200 * .cinit section. */ 200 * .cinit section. */
201 dsp_level = 0; 201 dsp_level = 0;
202 sdem_level = 0; 202 sdem_level = 0;
203 203
204 last_size = 0; 204 last_size = 0;
205 dma0_unlocked = 0; 205 dma0_unlocked = 0;
206 dma0_stopped = 1; 206 dma0_stopped = 1;
207 207
208 waiting = 0; 208 waiting = 0;
209 209
210 /* Configure SARAM to McBSP DMA */ 210 /* Configure SARAM to McBSP DMA */
211 211
212 /* Event XEVT0, 32-bit transfers, 0 frame count */ 212 /* Event XEVT0, 32-bit transfers, 0 frame count */
213 DMSFC0 = 2 << 12 | 1 << 11; 213 DMSFC0 = 2 << 12 | 1 << 11;
214 214
215 /* Interrupts generated, Half and full buffer. 215 /* Interrupts generated, Half and full buffer.
216 * ABU mode, From data space with postincrement, to data space with no 216 * ABU mode, From data space with postincrement, to data space with no
217 * change 217 * change
218 */ 218 */
219 DMMCR0 = 1 << 14 | 1 << 13 | 219 DMMCR0 = 1 << 14 | 1 << 13 |
220 1 << 12 | 1 << 8 | 1 << 6 | 1; 220 1 << 12 | 1 << 8 | 1 << 6 | 1;
221 221
222 /* Set the source (incrementing) location */ 222 /* Set the source (incrementing) location */
223 DMSRC0 = (unsigned short)&data; 223 DMSRC0 = (unsigned short)&data;
224 224
225 /* Set the destination (static) location to the McBSP IIS interface */ 225 /* Set the destination (static) location to the McBSP IIS interface */
226 DMDST0 = (unsigned short)&DXR20; 226 DMDST0 = (unsigned short)&DXR20;
227 227
228 /* Set the size of the buffer */ 228 /* Set the size of the buffer */
229 DMCTR0 = sizeof(data); 229 DMCTR0 = sizeof(data);
230 230
231 /* Setup DMA0 interrupts and start the transfer */ 231 /* Setup DMA0 interrupts and start the transfer */
232 DMPREC = 2 << 6; 232 DMPREC = 2 << 6;
233} 233}
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-07 17:46:42 +0000