1 files changed, 56 insertions, 56 deletions
diff --git a/firmware/target/arm/tms320dm320/dsp/aic23.c b/firmware/target/arm/tms320dm320/dsp/aic23.c
index 72b9dfe069..8ffa5d4e70 100644
--- a/firmware/target/arm/tms320dm320/dsp/aic23.c
+++ b/firmware/target/arm/tms320dm320/dsp/aic23.c
@@ -1,60 +1,60 @@
-/***************************************************************************
+/***************************************************************************
- *             __________               __   ___.
+ *             __________               __   ___.
- *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
- *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
- *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
- *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
- *                     \/            \/     \/    \/            \/
+ *                     \/            \/     \/    \/            \/
- * $Id$
+ * $Id$
- *
+ *
- * Copyright (C) 2008 by Maurus Cuelenaere
+ * Copyright (C) 2008 by Maurus Cuelenaere
- *
+ *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
- *
+ *
- * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
- * KIND, either express or implied.
+ * KIND, either express or implied.
- *
+ *
- ****************************************************************************/ 
+ ****************************************************************************/ 
-#include "audio.h"
+#include "audio.h"
-#include "registers.h"
+#include "registers.h"
-/* based on http://archopen.svn.sourceforge.net/viewvc/archopen/ArchOpen/trunk/libdsp/aic23.c?revision=213&view=markup */
+/* based on http://archopen.svn.sourceforge.net/viewvc/archopen/ArchOpen/trunk/libdsp/aic23.c?revision=213&view=markup */
-void audiohw_init(void)
+void audiohw_init(void)
-{
+{
-    /* port config */
+    /* port config */
-#if 0
+#if 0
-    SPCR10 = 0;                  /* DLB      = 0 ** RJUST    = 0 ** CLKSTP   = 0 ** DXENA    = 0 ** ABIS     = 0 ** RINTM    = 0 ** RSYNCER  = 0 ** RFULL    = 0 ** RRDY     = 0 ** RRST     = 0 */
+    SPCR10 = 0;                  /* DLB      = 0 ** RJUST    = 0 ** CLKSTP   = 0 ** DXENA    = 0 ** ABIS     = 0 ** RINTM    = 0 ** RSYNCER  = 0 ** RFULL    = 0 ** RRDY     = 0 ** RRST     = 0 */
-    SPCR20 = (1 << 9);           /* FREE     = 1 ** SOFT     = 0 ** FRST     = 0 ** GRST     = 0 ** XINTM    = 0 ** XSYNCER  = 0 ** XEMPTY   = 0 ** XRDY     = 0 ** XRST     = 0 */
+    SPCR20 = (1 << 9);           /* FREE     = 1 ** SOFT     = 0 ** FRST     = 0 ** GRST     = 0 ** XINTM    = 0 ** XSYNCER  = 0 ** XEMPTY   = 0 ** XRDY     = 0 ** XRST     = 0 */
-    RCR10 = (1 << 8) | (2 << 5); /* RFRLEN1  = 1 ** RWDLEN1  = 2 */
+    RCR10 = (1 << 8) | (2 << 5); /* RFRLEN1  = 1 ** RWDLEN1  = 2 */
-    RCR20 = 0;                   /* RPHASE   = 0 ** RFRLEN2  = 0 ** RWDLEN2  = 0 ** RCOMPAND = 0 ** RFIG     = 0 ** RDATDLY  = 0 */
+    RCR20 = 0;                   /* RPHASE   = 0 ** RFRLEN2  = 0 ** RWDLEN2  = 0 ** RCOMPAND = 0 ** RFIG     = 0 ** RDATDLY  = 0 */
-    XCR10 = (1 << 8) | (2 << 5); /* XFRLEN1  = 1 ** XWDLEN1  = 2 */
+    XCR10 = (1 << 8) | (2 << 5); /* XFRLEN1  = 1 ** XWDLEN1  = 2 */
-    XCR20 = 0;                   /* XPHASE   = 0 ** XFRLEN2  = 0 ** XWDLEN2  = 0 ** XCOMPAND = 0 ** XFIG     = 0 ** XDATDLY  = 0 */
+    XCR20 = 0;                   /* XPHASE   = 0 ** XFRLEN2  = 0 ** XWDLEN2  = 0 ** XCOMPAND = 0 ** XFIG     = 0 ** XDATDLY  = 0 */
-    SRGR10 = 0;                  /* FWID     = 0 ** CLKGDV   = 0 */
+    SRGR10 = 0;                  /* FWID     = 0 ** CLKGDV   = 0 */
-    SRGR20 = 0;                  /* FREE     = 0 ** CLKSP    = 0 ** CLKSM    = 0 ** FSGM     = 0 ** FPER     = 0 */             
+    SRGR20 = 0;                  /* FREE     = 0 ** CLKSP    = 0 ** CLKSM    = 0 ** FSGM     = 0 ** FPER     = 0 */             
-    PCR0 = (1 << 1) | 1;         /* IDLEEN   = 0 ** XIOEN    = 0 ** RIOEN    = 0 ** FSXM     = 0 ** FSRM     = 0 ** SCLKME   = 0 ** CLKSSTAT = 0 ** DXSTAT   = 0 ** DRSTAT   = 0 ** CLKXM    = 0 ** CLKRM    = 0 ** FSXP     = 0 ** FSRP     = 0 ** CLKXP    = 1 ** CLKRP    = 1 */
+    PCR0 = (1 << 1) | 1;         /* IDLEEN   = 0 ** XIOEN    = 0 ** RIOEN    = 0 ** FSXM     = 0 ** FSRM     = 0 ** SCLKME   = 0 ** CLKSSTAT = 0 ** DXSTAT   = 0 ** DRSTAT   = 0 ** CLKXM    = 0 ** CLKRM    = 0 ** FSXP     = 0 ** FSRP     = 0 ** CLKXP    = 1 ** CLKRP    = 1 */
-#else
+#else
-    SPCR10 = 0;
+    SPCR10 = 0;
-    SPCR20 = 0x0200; /* SPCR : free running mode */
+    SPCR20 = 0x0200; /* SPCR : free running mode */
-    
+    
-    RCR10 = 0x00A0;
+    RCR10 = 0x00A0;
-    RCR20 = 0x00A1; /* RCR  : 32 bit receive data length */
+    RCR20 = 0x00A1; /* RCR  : 32 bit receive data length */
-    
+    
-    XCR10 = 0x00A0;
+    XCR10 = 0x00A0;
-    XCR20 = 0x00A0; /* XCR  : 32 bit transmit data length */
+    XCR20 = 0x00A0; /* XCR  : 32 bit transmit data length */
-    
+    
-    SRGR10 = 0;
+    SRGR10 = 0;
-    SRGR20 = 0x3000; /* SRGR 1 & 2 */
+    SRGR20 = 0x3000; /* SRGR 1 & 2 */
-    
+    
-    PCR0 = 0x000E - 8; /* PCR  : FSX, FSR active low, external FS/CLK source */
+    PCR0 = 0x000E - 8; /* PCR  : FSX, FSR active low, external FS/CLK source */
-#endif
+#endif
-}
+}
-void audiohw_postinit(void)
+void audiohw_postinit(void)
-{
+{
-    /* Trigger first XEVT0 */
+    /* Trigger first XEVT0 */
-    SPCR20 |= 1;
+    SPCR20 |= 1;
-}
+}

diff --git a/firmware/target/arm/tms320dm320/dsp/aic23.c b/firmware/target/arm/tms320dm320/dsp/aic23.c index 72b9dfe069..8ffa5d4e70 100644 --- a/firmware/target/arm/tms320dm320/dsp/aic23.c +++ b/firmware/target/arm/tms320dm320/dsp/aic23.c
@@ -1,60 +1,60 @@
1	/***************************************************************************	1	/***************************************************************************
2	* __________ __ ___.	2	* __________ __ ___.
3	* Open \______ \ ____ ____ \| \| _\_ \|__ _______ ___	3	* Open \______ \ ____ ____ \| \| _\_ \|__ _______ ___
4	* Source \| _// _ \_/ ___\\| \|/ /\| __ \ / _ \ \/ /	4	* Source \| _// _ \_/ ___\\| \|/ /\| __ \ / _ \ \/ /
5	* Jukebox \| \| ( <_> ) \___\| < \| \_\ ( <_> > < <	5	* Jukebox \| \| ( <_> ) \___\| < \| \_\ ( <_> > < <
6	* Firmware \|____\|_ /\____/ \___ >__\|_ \\|___ /\____/__/\_ \	6	* Firmware \|____\|_ /\____/ \___ >__\|_ \\|___ /\____/__/\_ \
7	* \/ \/ \/ \/ \/	7	* \/ \/ \/ \/ \/
8	* $Id$	8	* $Id$
9	*	9	*
10	* Copyright (C) 2008 by Maurus Cuelenaere	10	* Copyright (C) 2008 by Maurus Cuelenaere
11	*	11	*
12	* This program is free software; you can redistribute it and/or	12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License	13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation; either version 2	14	* as published by the Free Software Foundation; either version 2
15	* of the License, or (at your option) any later version.	15	* of the License, or (at your option) any later version.
16	*	16	*
17	* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY	17	* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18	* KIND, either express or implied.	18	* KIND, either express or implied.
19	*	19	*
20	****************************************************************************/	20	****************************************************************************/
21		21
22	#include "audio.h"	22	#include "audio.h"
23	#include "registers.h"	23	#include "registers.h"
24		24
25	/* based on http://archopen.svn.sourceforge.net/viewvc/archopen/ArchOpen/trunk/libdsp/aic23.c?revision=213&view=markup */	25	/* based on http://archopen.svn.sourceforge.net/viewvc/archopen/ArchOpen/trunk/libdsp/aic23.c?revision=213&view=markup */
26	void audiohw_init(void)	26	void audiohw_init(void)
27	{	27	{
28	/* port config */	28	/* port config */
29	#if 0	29	#if 0
30	SPCR10 = 0; /* DLB = 0 RJUST = 0 CLKSTP = 0 DXENA = 0 ABIS = 0 RINTM = 0 RSYNCER = 0 RFULL = 0 RRDY = 0 ** RRST = 0 */	30	SPCR10 = 0; /* DLB = 0 RJUST = 0 CLKSTP = 0 DXENA = 0 ABIS = 0 RINTM = 0 RSYNCER = 0 RFULL = 0 RRDY = 0 ** RRST = 0 */
31	SPCR20 = (1 << 9); /* FREE = 1 SOFT = 0 FRST = 0 GRST = 0 XINTM = 0 XSYNCER = 0 XEMPTY = 0 XRDY = 0 XRST = 0 */	31	SPCR20 = (1 << 9); /* FREE = 1 SOFT = 0 FRST = 0 GRST = 0 XINTM = 0 XSYNCER = 0 XEMPTY = 0 XRDY = 0 XRST = 0 */
32	RCR10 = (1 << 8) \| (2 << 5); /* RFRLEN1 = 1 ** RWDLEN1 = 2 */	32	RCR10 = (1 << 8) \| (2 << 5); /* RFRLEN1 = 1 ** RWDLEN1 = 2 */
33	RCR20 = 0; /* RPHASE = 0 RFRLEN2 = 0 RWDLEN2 = 0 RCOMPAND = 0 RFIG = 0 ** RDATDLY = 0 */	33	RCR20 = 0; /* RPHASE = 0 RFRLEN2 = 0 RWDLEN2 = 0 RCOMPAND = 0 RFIG = 0 ** RDATDLY = 0 */
34	XCR10 = (1 << 8) \| (2 << 5); /* XFRLEN1 = 1 ** XWDLEN1 = 2 */	34	XCR10 = (1 << 8) \| (2 << 5); /* XFRLEN1 = 1 ** XWDLEN1 = 2 */
35	XCR20 = 0; /* XPHASE = 0 XFRLEN2 = 0 XWDLEN2 = 0 XCOMPAND = 0 XFIG = 0 ** XDATDLY = 0 */	35	XCR20 = 0; /* XPHASE = 0 XFRLEN2 = 0 XWDLEN2 = 0 XCOMPAND = 0 XFIG = 0 ** XDATDLY = 0 */
36	SRGR10 = 0; /* FWID = 0 ** CLKGDV = 0 */	36	SRGR10 = 0; /* FWID = 0 ** CLKGDV = 0 */
37	SRGR20 = 0; /* FREE = 0 CLKSP = 0 CLKSM = 0 FSGM = 0 FPER = 0 */	37	SRGR20 = 0; /* FREE = 0 CLKSP = 0 CLKSM = 0 FSGM = 0 FPER = 0 */
38	PCR0 = (1 << 1) \| 1; /* IDLEEN = 0 XIOEN = 0 RIOEN = 0 FSXM = 0 FSRM = 0 SCLKME = 0 CLKSSTAT = 0 DXSTAT = 0 DRSTAT = 0 CLKXM = 0 CLKRM = 0 FSXP = 0 FSRP = 0 CLKXP = 1 CLKRP = 1 */	38	PCR0 = (1 << 1) \| 1; /* IDLEEN = 0 XIOEN = 0 RIOEN = 0 FSXM = 0 FSRM = 0 SCLKME = 0 CLKSSTAT = 0 DXSTAT = 0 DRSTAT = 0 CLKXM = 0 CLKRM = 0 FSXP = 0 FSRP = 0 CLKXP = 1 CLKRP = 1 */
39	#else	39	#else
40	SPCR10 = 0;	40	SPCR10 = 0;
41	SPCR20 = 0x0200; /* SPCR : free running mode */	41	SPCR20 = 0x0200; /* SPCR : free running mode */
42		42
43	RCR10 = 0x00A0;	43	RCR10 = 0x00A0;
44	RCR20 = 0x00A1; /* RCR : 32 bit receive data length */	44	RCR20 = 0x00A1; /* RCR : 32 bit receive data length */
45		45
46	XCR10 = 0x00A0;	46	XCR10 = 0x00A0;
47	XCR20 = 0x00A0; /* XCR : 32 bit transmit data length */	47	XCR20 = 0x00A0; /* XCR : 32 bit transmit data length */
48		48
49	SRGR10 = 0;	49	SRGR10 = 0;
50	SRGR20 = 0x3000; /* SRGR 1 & 2 */	50	SRGR20 = 0x3000; /* SRGR 1 & 2 */
51		51
52	PCR0 = 0x000E - 8; /* PCR : FSX, FSR active low, external FS/CLK source */	52	PCR0 = 0x000E - 8; /* PCR : FSX, FSR active low, external FS/CLK source */
53	#endif	53	#endif
54	}	54	}
55		55
56	void audiohw_postinit(void)	56	void audiohw_postinit(void)
57	{	57	{
58	/* Trigger first XEVT0 */	58	/* Trigger first XEVT0 */
59	SPCR20 \|= 1;	59	SPCR20 \|= 1;
60	}	60	}