diff options
Diffstat (limited to 'firmware/target/arm/tcc77x/system-tcc77x.c')
-rw-r--r-- | firmware/target/arm/tcc77x/system-tcc77x.c | 152 |
1 files changed, 146 insertions, 6 deletions
diff --git a/firmware/target/arm/tcc77x/system-tcc77x.c b/firmware/target/arm/tcc77x/system-tcc77x.c index baa1641c78..7323b0ce55 100644 --- a/firmware/target/arm/tcc77x/system-tcc77x.c +++ b/firmware/target/arm/tcc77x/system-tcc77x.c | |||
@@ -21,6 +21,28 @@ | |||
21 | #include "system.h" | 21 | #include "system.h" |
22 | #include "panic.h" | 22 | #include "panic.h" |
23 | 23 | ||
24 | extern void TIMER(void); | ||
25 | |||
26 | void irq(void) | ||
27 | { | ||
28 | int irq = IREQ & 0x7fffffff; | ||
29 | CREQ = irq; /* Clears the corresponding IRQ status */ | ||
30 | |||
31 | if (irq & TIMER0_IRQ_MASK) | ||
32 | { | ||
33 | TIMER(); | ||
34 | } | ||
35 | else | ||
36 | { | ||
37 | panicf("Unhandled IRQ 0x%08X", irq); | ||
38 | } | ||
39 | } | ||
40 | |||
41 | void fiq_handler(void) | ||
42 | { | ||
43 | /* TODO */ | ||
44 | } | ||
45 | |||
24 | void system_reboot(void) | 46 | void system_reboot(void) |
25 | { | 47 | { |
26 | } | 48 | } |
@@ -49,7 +71,7 @@ static void gpio_init(void) | |||
49 | GPIOB_DIR = 0x6ffff; | 71 | GPIOB_DIR = 0x6ffff; |
50 | GPIOB = 0; | 72 | GPIOB = 0; |
51 | GPIOC_FUNC = 1; | 73 | GPIOC_FUNC = 1; |
52 | GPIOC_DIR = 0x03ffffff; /* mvn r2, 0xfc000000 */ | 74 | GPIOC_DIR = 0x03ffffff; /* mvn r2, 0xfc000000 */ |
53 | GPIOC = 0; | 75 | GPIOC = 0; |
54 | } | 76 | } |
55 | #elif defined(IAUDIO_7) | 77 | #elif defined(IAUDIO_7) |
@@ -72,6 +94,11 @@ static void gpio_init(void) | |||
72 | GPIOD_DIR = 0x3e3; | 94 | GPIOD_DIR = 0x3e3; |
73 | GPIOE_DIR = 0x88; | 95 | GPIOE_DIR = 0x88; |
74 | } | 96 | } |
97 | #elif defined(SANSA_M200) | ||
98 | static void gpio_init(void) | ||
99 | { | ||
100 | /* TODO - Implement for M200 */ | ||
101 | } | ||
75 | #endif | 102 | #endif |
76 | 103 | ||
77 | /* Second function called in the original firmware's startup code - we just | 104 | /* Second function called in the original firmware's startup code - we just |
@@ -80,14 +107,16 @@ static void clock_init(void) | |||
80 | { | 107 | { |
81 | unsigned int i; | 108 | unsigned int i; |
82 | 109 | ||
110 | /* STP = 0x1, PW = 0x04 , HLD = 0x0 */ | ||
83 | CSCFG3 = (CSCFG3 &~ 0x3fff) | 0x820; | 111 | CSCFG3 = (CSCFG3 &~ 0x3fff) | 0x820; |
84 | 112 | ||
113 | /* XIN=External main, Fcpu=Fsys, BCKDIV=1 (Fbus = Fsys / 2) */ | ||
85 | CLKCTRL = (CLKCTRL & ~0xff) | 0x14; | 114 | CLKCTRL = (CLKCTRL & ~0xff) | 0x14; |
86 | 115 | ||
87 | if (BMI & 0x20) | 116 | if (BMI & 0x20) |
88 | PCLKCFG0 = 0xc82d7000; | 117 | PCLKCFG0 = 0xc82d7000; /* EN1 = 1, XIN=Ext. main, DIV1 = 0x2d, P1 = 1 */ |
89 | else | 118 | else |
90 | PCLKCFG0 = 0xc8ba7000; | 119 | PCLKCFG0 = 0xc8ba7000; /* EN1 = 1, XIN=Ext. main, DIV1 = 0xba, P1 = 1 */ |
91 | 120 | ||
92 | MCFG |= 0x2000; | 121 | MCFG |= 0x2000; |
93 | 122 | ||
@@ -96,14 +125,20 @@ static void clock_init(void) | |||
96 | SDCFG = (SDCFG & ~0x7000) | 0x2000; | 125 | SDCFG = (SDCFG & ~0x7000) | 0x2000; |
97 | #endif | 126 | #endif |
98 | 127 | ||
128 | /* Disable PLL */ | ||
99 | PLL0CFG |= 0x80000000; | 129 | PLL0CFG |= 0x80000000; |
100 | 130 | ||
131 | /* Enable PLL, M=0xcf, P=0x13. m=M+8, p=P+2, S = 0 | ||
132 | Fout = (215/21)*12MHz = 122857142Hz */ | ||
101 | PLL0CFG = 0x0000cf13; | 133 | PLL0CFG = 0x0000cf13; |
102 | 134 | ||
103 | i = 8000; | 135 | i = 8000; |
104 | while (--i) {}; | 136 | while (--i) {}; |
105 | 137 | ||
106 | CLKDIV0 = 0x81000000; | 138 | /* Enable PLL0 */ |
139 | CLKDIVC = 0x81000000; | ||
140 | |||
141 | /* Fsys = PLL0, Fcpu = Fsys, Fbus=Fsys / 2 */ | ||
107 | CLKCTRL = 0x80000010; | 142 | CLKCTRL = 0x80000010; |
108 | 143 | ||
109 | asm volatile ( | 144 | asm volatile ( |
@@ -112,13 +147,118 @@ static void clock_init(void) | |||
112 | ); | 147 | ); |
113 | } | 148 | } |
114 | 149 | ||
150 | static void cpu_init(void) | ||
151 | { | ||
152 | /* Memory protection - see page 48 of ARM946 TRM | ||
153 | http://infocenter.arm.com/help/topic/com.arm.doc.ddi0201d/DDI0201D_arm946es_r1p1_trm.pdf | ||
154 | */ | ||
155 | asm volatile ( | ||
156 | /* Region 0 - addr=0, size=4GB, enabled */ | ||
157 | "mov r0, #0x3f \n\t" | ||
158 | "mcr p15, 0, r0, c6, c0, 0 \n\t" | ||
159 | "mcr p15, 0, r0, c6, c0, 1 \n\t" | ||
160 | |||
161 | #ifdef LOGIK_DAX | ||
162 | /* Address region 1 - addr 0x2fff0000, size=64KB, enabled*/ | ||
163 | "ldr r0, =0x2fff001f \n\t" | ||
164 | #elif defined(IAUDIO_7) | ||
165 | /* Address region 1 - addr 0x20000000, size=8KB, enabled*/ | ||
166 | "mov r0, #0x19 \n\t" | ||
167 | "add r0, r0, #0x20000000 \n\t" | ||
168 | #elif defined(SANSA_M200) | ||
169 | /* Address region 1 - addr 0x20000000, size=256MB, enabled*/ | ||
170 | "mov r0, #0x37 \n\t" | ||
171 | "add r0, r0, #0x20000000 \n\t" | ||
172 | #endif | ||
173 | "mcr p15, 0, r0, c6, c1, 0 \n\t" | ||
174 | "mcr p15, 0, r0, c6, c1, 1 \n\t" | ||
175 | |||
176 | /* Address region 2 - addr 0x30000000, size=256MB, enabled*/ | ||
177 | "mov r0, #0x37 \n\t" | ||
178 | "add r0, r0, #0x30000000 \n\t" | ||
179 | "mcr p15, 0, r0, c6, c2, 0 \n\t" | ||
180 | "mcr p15, 0, r0, c6, c2, 1 \n\t" | ||
181 | |||
182 | /* Address region 2 - addr 0x40000000, size=512MB, enabled*/ | ||
183 | "mov r0, #0x39 \n\t" | ||
184 | "add r0, r0, #0x40000000 \n\t" | ||
185 | "mcr p15, 0, r0, c6, c3, 0 \n\t" | ||
186 | "mcr p15, 0, r0, c6, c3, 1 \n\t" | ||
187 | |||
188 | /* Address region 4 - addr 0x60000000, size=256MB, enabled*/ | ||
189 | "mov r0, #0x37 \n\t" | ||
190 | "add r0, r0, #0x60000000 \n\t" | ||
191 | "mcr p15, 0, r0, c6, c4, 0 \n\t" | ||
192 | "mcr p15, 0, r0, c6, c4, 1 \n\t" | ||
193 | |||
194 | /* Address region 5 - addr 0x10000000, size=256MB, enabled*/ | ||
195 | "mov r0, #0x37 \n\t" | ||
196 | "add r0, r0, #0x10000000 \n\t" | ||
197 | "mcr p15, 0, r0, c6, c5, 0 \n\t" | ||
198 | "mcr p15, 0, r0, c6, c5, 1 \n\t" | ||
199 | |||
200 | /* Address region 6 - addr 0x80000000, size=2GB, enabled*/ | ||
201 | "mov r0, #0x37 \n\t" | ||
202 | "add r0, r0, #0x80000006 \n\t" | ||
203 | "mcr p15, 0, r0, c6, c6, 0 \n\t" | ||
204 | "mcr p15, 0, r0, c6, c6, 1 \n\t" | ||
205 | |||
206 | /* Address region 7 - addr 0x3000f000, size=4KB, enabled*/ | ||
207 | "ldr r0, =0x3000f017 \n\t" | ||
208 | "mcr p15, 0, r0, c6, c7, 0 \n\t" | ||
209 | "mcr p15, 0, r0, c6, c7, 1 \n\t" | ||
210 | |||
211 | |||
212 | /* Register 5 - Access Permission Registers */ | ||
213 | |||
214 | "ldr r0, =0xffff \n\t" | ||
215 | "mcr p15, 0, r0, c5, c0, 0 \n\t" /* write data access permission bits */ | ||
216 | "mcr p15, 0, r0, c5, c0, 1 \n\t" /* write instruction access permission bits */ | ||
217 | |||
218 | "mov r0, #0xa7 \n\t" | ||
219 | "mcr p15, 0, r0, c3, c0, 0 \n\t" /* set write buffer control register */ | ||
220 | |||
221 | #ifdef LOGIK_DAX | ||
222 | "mov r0, #0xa5 \n\t" | ||
223 | #elif defined(IAUDIO_7) || defined(SANSA_M200) | ||
224 | "mov r0, #0xa7 \n\t" | ||
225 | #elif | ||
226 | #error NOT DEFINED FOR THIS TARGET! | ||
227 | #endif | ||
228 | "mcr p15, 0, r0, c2, c0, 0 \n\t" | ||
229 | "mcr p15, 0, r0, c2, c0, 1 \n\t" | ||
230 | |||
231 | "mov r0, #0xa0000006 \n\t" | ||
232 | "mcr p15, 0, r0, c9, c1, 0 \n\t" | ||
233 | |||
234 | "ldr r1, =0x1107d \n\t" | ||
235 | "mov r0, #0x0 \n\t" | ||
236 | "mcr p15, 0, r0, c7, c5, 0 \n\t" /* Flush instruction cache */ | ||
237 | "mcr p15, 0, r0, c7, c6, 0 \n\t" /* Flush data cache */ | ||
238 | |||
239 | "mcr p15, 0, r1, c1, c0, 0 \n\t" /* CPU control bits */ | ||
240 | : : : "r0", "r1" | ||
241 | ); | ||
242 | } | ||
243 | |||
244 | |||
115 | 245 | ||
116 | void system_init(void) | 246 | void system_init(void) |
117 | { | 247 | { |
118 | /* TODO: cache init - the original firmwares have cache init code which | 248 | /* mask all interrupts */ |
119 | is called at the very start of the firmware */ | 249 | IEN = 0; |
250 | |||
251 | /* Set all interrupts as IRQ for now - some may need to be FIQ in future */ | ||
252 | IRQSEL = 0xffffffff; | ||
253 | |||
254 | /* Set master enable bit */ | ||
255 | IEN = 0x80000000; | ||
256 | |||
257 | cpu_init(); | ||
120 | clock_init(); | 258 | clock_init(); |
121 | gpio_init(); | 259 | gpio_init(); |
260 | |||
261 | enable_irq(); | ||
122 | } | 262 | } |
123 | 263 | ||
124 | int system_memory_guard(int newmode) | 264 | int system_memory_guard(int newmode) |