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Diffstat (limited to 'firmware/target/arm/tcc77x/system-tcc77x.c')
-rw-r--r--firmware/target/arm/tcc77x/system-tcc77x.c326
1 files changed, 0 insertions, 326 deletions
diff --git a/firmware/target/arm/tcc77x/system-tcc77x.c b/firmware/target/arm/tcc77x/system-tcc77x.c
deleted file mode 100644
index cffb4deba4..0000000000
--- a/firmware/target/arm/tcc77x/system-tcc77x.c
+++ /dev/null
@@ -1,326 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Dave Chapman
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "kernel.h"
23#include "system.h"
24#include "panic.h"
25
26/* Externally defined interrupt handlers */
27extern void TIMER(void);
28extern void ADC(void);
29extern void USB_DEVICE(void);
30
31void irq(void)
32{
33 int irq = IREQ & 0x7fffffff;
34 CREQ = irq; /* Clears the corresponding IRQ status */
35
36 if (irq & TIMER0_IRQ_MASK)
37 TIMER();
38 else if (irq & ADC_IRQ_MASK)
39 ADC();
40#ifdef HAVE_USBSTACK
41 else if (irq & USBD_IRQ_MASK)
42 USB_DEVICE();
43#endif
44 else
45 panicf("Unhandled IRQ 0x%08X", irq);
46}
47
48void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked));
49
50#ifdef BOOTLOADER
51void fiq_handler(void)
52{
53 /* TODO */
54}
55#endif
56
57void system_reboot(void)
58{
59}
60
61void system_exception_wait(void)
62{
63 while (1);
64}
65
66/* TODO - these should live in the target-specific directories and
67 once we understand what all the GPIO pins do, move the init to the
68 specific driver for that hardware. For now, we just perform the
69 same GPIO init as the original firmware - this makes it easier to
70 investigate what the GPIO pins do.
71*/
72
73#ifdef LOGIK_DAX
74static void gpio_init(void)
75{
76 /* Do what the original firmware does */
77 GPIOD_FUNC = 0;
78 GPIOD_DIR = 0x3f0;
79 GPIOD = 0xe0;
80
81 GPIOE_FUNC = 0;
82 GPIOE_DIR = 0xe0;
83 GPIOE = 0;
84
85 GPIOA_FUNC = 0;
86 GPIOA_DIR = 0xffff1000; /* 0 - 0xf000 */
87 GPIOA = 0x1080;
88
89 GPIOB_FUNC = 0x16a3;
90 GPIOB_DIR = 0x6ffff;
91 GPIOB = 0;
92
93 GPIOC_FUNC = 1;
94 GPIOC_DIR = 0x03ffffff; /* mvn r2, 0xfc000000 */
95 GPIOC = 0;
96}
97#elif defined(IAUDIO_7)
98static void gpio_init(void)
99{
100 /* Do what the original firmware does */
101 GPIOA_FUNC = 0;
102 GPIOB_FUNC = 0x1623;
103 GPIOC_FUNC = 1;
104 GPIOD_FUNC = 0;
105 GPIOE_FUNC = 0;
106 GPIOA = 0x30;
107 GPIOB = 0x00c00;
108 GPIOC = 0;
109 GPIOD = 0x180;
110 GPIOE = 0x80;
111 GPIOA_DIR = 0x84b0;
112 GPIOB_DIR = 0x80c00;
113 GPIOC_DIR = 0x2000000;
114 GPIOD_DIR = 0x3e3;
115 GPIOE_DIR = 0x88;
116}
117#elif defined(SANSA_M200)
118static void gpio_init(void)
119{
120 /* TODO - Implement for M200 */
121}
122#elif defined(SANSA_C100)
123static void gpio_init(void)
124{
125 /* Do what the original firmware does */
126 GPIOA_FUNC = 0;
127 GPIOB_FUNC = 0x16A3;
128 GPIOC_FUNC = 1;
129 GPIOD_FUNC |= 2;
130 GPIOE_FUNC = 0;
131
132 GPIOA_DIR = 0xFFFF0E00;
133 GPIOB_DIR = 0x6FFFF;
134 GPIOC_DIR = 0x03FFFFFF;
135 GPIOD_DIR = 0x3F7;
136 GPIOE_DIR = 0x9B;
137
138 GPIOA = 0x80;
139 GPIOB = 0;
140 GPIOC = 0;
141 GPIOD |= 0xC0;
142 GPIOE = 0x9B;
143}
144#endif
145
146/* Second function called in the original firmware's startup code - we just
147 set up the clocks in the same way as the original firmware for now. */
148static void clock_init(void)
149{
150 unsigned int i;
151
152 /* STP = 0x1, PW = 0x04 , HLD = 0x0 */
153 CSCFG3 = (CSCFG3 &~ 0x3fff) | 0x820;
154
155 /* XIN=External main, Fcpu=Fsys, BCKDIV=1 (Fbus = Fsys / 2) */
156 CLKCTRL = (CLKCTRL & ~0xff) | 0x14;
157
158 if (BMI & 0x20)
159 PCLKCFG0 = 0xc82d7000; /* EN1 = 1, XIN=Ext. main, DIV1 = 0x2d, P1 = 1 */
160 else
161 PCLKCFG0 = 0xc8ba7000; /* EN1 = 1, XIN=Ext. main, DIV1 = 0xba, P1 = 1 */
162
163 MCFG |= 0x2000;
164
165#ifdef LOGIK_DAX
166 /* Only seen in the Logik DAX original firmware */
167 SDCFG = (SDCFG & ~0x7000) | 0x2000;
168#endif
169
170 /* Disable PLL */
171 PLL0CFG |= 0x80000000;
172
173 /* Enable PLL, M=0xcf, P=0x13. m=M+8, p=P+2, S = 0
174 Fout = (215/21)*12MHz = 122857142Hz */
175 PLL0CFG = 0x0000cf13;
176
177 i = 8000;
178 while (--i) {};
179
180 /* Enable PLL0 */
181 CLKDIVC = 0x81000000;
182
183 /* Fsys = PLL0, Fcpu = Fsys, Fbus=Fsys / 2 */
184 CLKCTRL = 0x80000010;
185
186 asm volatile (
187 "nop \n\t"
188 "nop \n\t"
189 );
190
191 /* Enable Z-Clock */
192 PCLKCFG5 |= (1<<31) | (4<<28); /* Timer Z-Clock enable, XIN direct*/
193
194 /* Set TC32 timer to be our USEC_TIMER (Xin divided by 12 = 1MHz) */
195 TC32MCNT = 0;
196 TC32LDV = 0;
197 TC32EN = (1<<24) | 11;
198}
199
200static void cpu_init(void)
201{
202 /* Memory protection - see page 48 of ARM946 TRM
203http://infocenter.arm.com/help/topic/com.arm.doc.ddi0201d/DDI0201D_arm946es_r1p1_trm.pdf
204 */
205 asm volatile (
206 /* Region 0 - addr=0, size=4GB, enabled */
207 "mov r0, #0x3f \n\t"
208 "mcr p15, 0, r0, c6, c0, 0 \n\t"
209 "mcr p15, 0, r0, c6, c0, 1 \n\t"
210
211#if defined(LOGIK_DAX) || defined(SANSA_C100)
212 /* Address region 1 - addr 0x2fff0000, size=64KB, enabled*/
213 "ldr r0, =0x2fff001f \n\t"
214#elif defined(IAUDIO_7)
215 /* Address region 1 - addr 0x20000000, size=8KB, enabled*/
216 "mov r0, #0x19 \n\t"
217 "add r0, r0, #0x20000000 \n\t"
218#elif defined(SANSA_M200)
219 /* Address region 1 - addr 0x20000000, size=256MB, enabled*/
220 "mov r0, #0x37 \n\t"
221 "add r0, r0, #0x20000000 \n\t"
222#endif
223 "mcr p15, 0, r0, c6, c1, 0 \n\t"
224 "mcr p15, 0, r0, c6, c1, 1 \n\t"
225
226 /* Address region 2 - addr 0x30000000, size=256MB, enabled*/
227 "mov r0, #0x37 \n\t"
228 "add r0, r0, #0x30000000 \n\t"
229 "mcr p15, 0, r0, c6, c2, 0 \n\t"
230 "mcr p15, 0, r0, c6, c2, 1 \n\t"
231
232 /* Address region 2 - addr 0x40000000, size=512MB, enabled*/
233 "mov r0, #0x39 \n\t"
234 "add r0, r0, #0x40000000 \n\t"
235 "mcr p15, 0, r0, c6, c3, 0 \n\t"
236 "mcr p15, 0, r0, c6, c3, 1 \n\t"
237
238 /* Address region 4 - addr 0x60000000, size=256MB, enabled*/
239 "mov r0, #0x37 \n\t"
240 "add r0, r0, #0x60000000 \n\t"
241 "mcr p15, 0, r0, c6, c4, 0 \n\t"
242 "mcr p15, 0, r0, c6, c4, 1 \n\t"
243
244 /* Address region 5 - addr 0x10000000, size=256MB, enabled*/
245 "mov r0, #0x37 \n\t"
246 "add r0, r0, #0x10000000 \n\t"
247 "mcr p15, 0, r0, c6, c5, 0 \n\t"
248 "mcr p15, 0, r0, c6, c5, 1 \n\t"
249
250 /* Address region 6 - addr 0x80000000, size=2GB, enabled*/
251 "mov r0, #0x37 \n\t"
252 "add r0, r0, #0x80000006 \n\t"
253 "mcr p15, 0, r0, c6, c6, 0 \n\t"
254 "mcr p15, 0, r0, c6, c6, 1 \n\t"
255
256 /* Address region 7 - addr 0x3000f000, size=4KB, enabled*/
257 "ldr r0, =0x3000f017 \n\t"
258 "mcr p15, 0, r0, c6, c7, 0 \n\t"
259 "mcr p15, 0, r0, c6, c7, 1 \n\t"
260
261
262 /* Register 5 - Access Permission Registers */
263
264 "ldr r0, =0xffff \n\t"
265 "mcr p15, 0, r0, c5, c0, 0 \n\t" /* write data access permission bits */
266 "mcr p15, 0, r0, c5, c0, 1 \n\t" /* write instruction access permission bits */
267
268 "mov r0, #0xa7 \n\t"
269 "mcr p15, 0, r0, c3, c0, 0 \n\t" /* set write buffer control register */
270
271#if defined(LOGIK_DAX) || defined(SANSA_C100)
272 "mov r0, #0xa5 \n\t"
273#elif defined(IAUDIO_7) || defined(SANSA_M200)
274 "mov r0, #0xa7 \n\t"
275#else
276 #error NOT DEFINED FOR THIS TARGET!
277#endif
278 "mcr p15, 0, r0, c2, c0, 0 \n\t"
279 "mcr p15, 0, r0, c2, c0, 1 \n\t"
280
281 "mov r0, #0xa0000006 \n\t"
282 "mcr p15, 0, r0, c9, c1, 0 \n\t"
283
284 "ldr r1, =0x1107d \n\t"
285 "mov r0, #0x0 \n\t"
286 "mcr p15, 0, r0, c7, c5, 0 \n\t" /* Flush instruction cache */
287 "mcr p15, 0, r0, c7, c6, 0 \n\t" /* Flush data cache */
288
289 "mcr p15, 0, r1, c1, c0, 0 \n\t" /* CPU control bits */
290 : : : "r0", "r1"
291 );
292}
293
294
295
296void system_init(void)
297{
298 /* mask all interrupts */
299 IEN = 0;
300
301 /* Set all interrupts as IRQ for now - some may need to be FIQ in future */
302 IRQSEL = 0xffffffff;
303
304 /* Set master enable bit */
305 IEN = 0x80000000;
306
307 cpu_init();
308 clock_init();
309 gpio_init();
310
311 enable_irq();
312}
313
314int system_memory_guard(int newmode)
315{
316 (void)newmode;
317 return 0;
318}
319
320#ifdef HAVE_ADJUSTABLE_CPU_FREQ
321
322void set_cpu_frequency(long frequency)
323{
324}
325
326#endif
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