diff options
Diffstat (limited to 'firmware/target/arm/s5l8702')
-rw-r--r-- | firmware/target/arm/s5l8702/ipod6g/lcd-ipod6g.c | 8 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c | 35 |
2 files changed, 23 insertions, 20 deletions
diff --git a/firmware/target/arm/s5l8702/ipod6g/lcd-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/lcd-ipod6g.c index de731a91b8..0ad9da22bb 100644 --- a/firmware/target/arm/s5l8702/ipod6g/lcd-ipod6g.c +++ b/firmware/target/arm/s5l8702/ipod6g/lcd-ipod6g.c | |||
@@ -50,7 +50,7 @@ | |||
50 | 50 | ||
51 | int lcd_type; /* also needed in debug-s5l8702.c */ | 51 | int lcd_type; /* also needed in debug-s5l8702.c */ |
52 | static struct dma_lli lcd_lli[(LCD_WIDTH * LCD_HEIGHT - 1) / 0xfff] CACHEALIGN_ATTR; | 52 | static struct dma_lli lcd_lli[(LCD_WIDTH * LCD_HEIGHT - 1) / 0xfff] CACHEALIGN_ATTR; |
53 | static struct wakeup lcd_wakeup; | 53 | static struct semaphore lcd_wakeup; |
54 | static struct mutex lcd_mutex; | 54 | static struct mutex lcd_mutex; |
55 | static uint16_t lcd_dblbuf[LCD_HEIGHT][LCD_WIDTH]; | 55 | static uint16_t lcd_dblbuf[LCD_HEIGHT][LCD_WIDTH]; |
56 | 56 | ||
@@ -149,7 +149,7 @@ void lcd_sleep(void) | |||
149 | void lcd_init_device(void) | 149 | void lcd_init_device(void) |
150 | { | 150 | { |
151 | /* Detect lcd type */ | 151 | /* Detect lcd type */ |
152 | wakeup_init(&lcd_wakeup); | 152 | semaphore_init(&lcd_wakeup, 1, 0); |
153 | mutex_init(&lcd_mutex); | 153 | mutex_init(&lcd_mutex); |
154 | lcd_type = (PDAT6 & 0x30) >> 4; | 154 | lcd_type = (PDAT6 & 0x30) >> 4; |
155 | } | 155 | } |
@@ -180,7 +180,7 @@ static void displaylcd_setup(int x, int y, int width, int height) ICODE_ATTR; | |||
180 | static void displaylcd_setup(int x, int y, int width, int height) | 180 | static void displaylcd_setup(int x, int y, int width, int height) |
181 | { | 181 | { |
182 | mutex_lock(&lcd_mutex); | 182 | mutex_lock(&lcd_mutex); |
183 | while (DMAC0C4CONFIG & 1) wakeup_wait(&lcd_wakeup, HZ / 10); | 183 | while (DMAC0C4CONFIG & 1) semaphore_wait(&lcd_wakeup, HZ / 10); |
184 | 184 | ||
185 | int xe = (x + width) - 1; /* max horiz */ | 185 | int xe = (x + width) - 1; /* max horiz */ |
186 | int ye = (y + height) - 1; /* max vert */ | 186 | int ye = (y + height) - 1; /* max vert */ |
@@ -237,7 +237,7 @@ void INT_DMAC0C4(void) ICODE_ATTR; | |||
237 | void INT_DMAC0C4(void) | 237 | void INT_DMAC0C4(void) |
238 | { | 238 | { |
239 | DMAC0INTTCCLR = 0x10; | 239 | DMAC0INTTCCLR = 0x10; |
240 | wakeup_signal(&lcd_wakeup); | 240 | semaphore_release(&lcd_wakeup); |
241 | } | 241 | } |
242 | 242 | ||
243 | /* Update a fraction of the display. */ | 243 | /* Update a fraction of the display. */ |
diff --git a/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c index 66e02d65bb..79a8964c3c 100644 --- a/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c +++ b/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c | |||
@@ -53,7 +53,7 @@ bool ata_lba48; | |||
53 | bool ata_dma; | 53 | bool ata_dma; |
54 | uint64_t ata_total_sectors; | 54 | uint64_t ata_total_sectors; |
55 | struct mutex ata_mutex; | 55 | struct mutex ata_mutex; |
56 | static struct wakeup ata_wakeup; | 56 | static struct semaphore ata_wakeup; |
57 | static uint32_t ata_dma_flags; | 57 | static uint32_t ata_dma_flags; |
58 | static long ata_last_activity_value = -1; | 58 | static long ata_last_activity_value = -1; |
59 | static long ata_sleep_timeout = 20 * HZ; | 59 | static long ata_sleep_timeout = 20 * HZ; |
@@ -61,8 +61,8 @@ static uint32_t ata_stack[(DEFAULT_STACK_SIZE + 0x400) / 4]; | |||
61 | static bool ata_powered; | 61 | static bool ata_powered; |
62 | static const int ata_retries = ATA_RETRIES; | 62 | static const int ata_retries = ATA_RETRIES; |
63 | static const bool ata_error_srst = true; | 63 | static const bool ata_error_srst = true; |
64 | static struct wakeup mmc_wakeup; | 64 | static struct semaphore mmc_wakeup; |
65 | static struct wakeup mmc_comp_wakeup; | 65 | static struct semaphore mmc_comp_wakeup; |
66 | static int spinup_time = 0; | 66 | static int spinup_time = 0; |
67 | static int dma_mode = 0; | 67 | static int dma_mode = 0; |
68 | 68 | ||
@@ -319,7 +319,7 @@ void mmc_discard_irq(void) | |||
319 | { | 319 | { |
320 | SDCI_IRQ = SDCI_IRQ_DAT_DONE_INT | SDCI_IRQ_MASK_MASK_IOCARD_IRQ_INT | 320 | SDCI_IRQ = SDCI_IRQ_DAT_DONE_INT | SDCI_IRQ_MASK_MASK_IOCARD_IRQ_INT |
321 | | SDCI_IRQ_MASK_MASK_READ_WAIT_INT; | 321 | | SDCI_IRQ_MASK_MASK_READ_WAIT_INT; |
322 | wakeup_wait(&mmc_wakeup, 0); | 322 | semaphore_wait(&mmc_wakeup, 0); |
323 | } | 323 | } |
324 | 324 | ||
325 | int ceata_read_multiple_register(uint32_t addr, void* dest, uint32_t size) | 325 | int ceata_read_multiple_register(uint32_t addr, void* dest, uint32_t size) |
@@ -338,7 +338,8 @@ int ceata_read_multiple_register(uint32_t addr, void* dest, uint32_t size) | |||
338 | | MMC_CMD_CEATA_RW_MULTIPLE_REG_ADDRESS(addr & 0xfc) | 338 | | MMC_CMD_CEATA_RW_MULTIPLE_REG_ADDRESS(addr & 0xfc) |
339 | | MMC_CMD_CEATA_RW_MULTIPLE_REG_COUNT(size & 0xfc), | 339 | | MMC_CMD_CEATA_RW_MULTIPLE_REG_COUNT(size & 0xfc), |
340 | NULL, CEATA_COMMAND_TIMEOUT), 2, 1); | 340 | NULL, CEATA_COMMAND_TIMEOUT), 2, 1); |
341 | if (wakeup_wait(&mmc_wakeup, CEATA_COMMAND_TIMEOUT * HZ / 1000000) == OBJ_WAIT_TIMEDOUT) RET_ERR(2); | 341 | if (semaphore_wait(&mmc_wakeup, CEATA_COMMAND_TIMEOUT * HZ / 1000000) |
342 | == OBJ_WAIT_TIMEDOUT) RET_ERR(2); | ||
342 | PASS_RC(mmc_dsta_check_data_success(), 2, 3); | 343 | PASS_RC(mmc_dsta_check_data_success(), 2, 3); |
343 | return 0; | 344 | return 0; |
344 | } | 345 | } |
@@ -362,7 +363,8 @@ int ceata_write_multiple_register(uint32_t addr, void* dest, uint32_t size) | |||
362 | SDCI_DCTRL = SDCI_DCTRL_TRCONT_TX; | 363 | SDCI_DCTRL = SDCI_DCTRL_TRCONT_TX; |
363 | for (i = 0; i < size / 4; i++) SDCI_DATA = ((uint32_t*)dest)[i]; | 364 | for (i = 0; i < size / 4; i++) SDCI_DATA = ((uint32_t*)dest)[i]; |
364 | long startusec = USEC_TIMER; | 365 | long startusec = USEC_TIMER; |
365 | if (wakeup_wait(&mmc_wakeup, CEATA_COMMAND_TIMEOUT * HZ / 1000000) == OBJ_WAIT_TIMEDOUT) RET_ERR(2); | 366 | if (semaphore_wait(&mmc_wakeup, CEATA_COMMAND_TIMEOUT * HZ / 1000000) |
367 | == OBJ_WAIT_TIMEDOUT) RET_ERR(2); | ||
366 | while ((SDCI_STATE & SDCI_STATE_DAT_STATE_MASK) != SDCI_STATE_DAT_STATE_IDLE) | 368 | while ((SDCI_STATE & SDCI_STATE_DAT_STATE_MASK) != SDCI_STATE_DAT_STATE_IDLE) |
367 | { | 369 | { |
368 | if (TIMEOUT_EXPIRED(startusec, CEATA_COMMAND_TIMEOUT)) RET_ERR(3); | 370 | if (TIMEOUT_EXPIRED(startusec, CEATA_COMMAND_TIMEOUT)) RET_ERR(3); |
@@ -479,13 +481,13 @@ int ceata_rw_multiple_block(bool write, void* buf, uint32_t count, long timeout) | |||
479 | direction | MMC_CMD_CEATA_RW_MULTIPLE_BLOCK_COUNT(count), | 481 | direction | MMC_CMD_CEATA_RW_MULTIPLE_BLOCK_COUNT(count), |
480 | NULL, CEATA_COMMAND_TIMEOUT), 4, 0); | 482 | NULL, CEATA_COMMAND_TIMEOUT), 4, 0); |
481 | if (write) SDCI_DCTRL = SDCI_DCTRL_TRCONT_TX; | 483 | if (write) SDCI_DCTRL = SDCI_DCTRL_TRCONT_TX; |
482 | if (wakeup_wait(&mmc_wakeup, timeout) == OBJ_WAIT_TIMEDOUT) | 484 | if (semaphore_wait(&mmc_wakeup, timeout) == OBJ_WAIT_TIMEDOUT) |
483 | { | 485 | { |
484 | PASS_RC(ceata_cancel_command(), 4, 1); | 486 | PASS_RC(ceata_cancel_command(), 4, 1); |
485 | RET_ERR(2); | 487 | RET_ERR(2); |
486 | } | 488 | } |
487 | PASS_RC(mmc_dsta_check_data_success(), 4, 3); | 489 | PASS_RC(mmc_dsta_check_data_success(), 4, 3); |
488 | if (wakeup_wait(&mmc_comp_wakeup, timeout) == OBJ_WAIT_TIMEDOUT) | 490 | if (semaphore_wait(&mmc_comp_wakeup, timeout) == OBJ_WAIT_TIMEDOUT) |
489 | { | 491 | { |
490 | PASS_RC(ceata_cancel_command(), 4, 4); | 492 | PASS_RC(ceata_cancel_command(), 4, 4); |
491 | RET_ERR(4); | 493 | RET_ERR(4); |
@@ -750,11 +752,12 @@ int ata_rw_chunk_internal(uint64_t sector, uint32_t cnt, void* buffer, bool writ | |||
750 | ATA_XFR_NUM = SECTOR_SIZE * cnt - 1; | 752 | ATA_XFR_NUM = SECTOR_SIZE * cnt - 1; |
751 | ATA_CFG |= ata_dma_flags; | 753 | ATA_CFG |= ata_dma_flags; |
752 | ATA_CFG &= ~(BIT(7) | BIT(8)); | 754 | ATA_CFG &= ~(BIT(7) | BIT(8)); |
753 | wakeup_wait(&ata_wakeup, 0); | 755 | semaphore_wait(&ata_wakeup, 0); |
754 | ATA_IRQ = BITRANGE(0, 4); | 756 | ATA_IRQ = BITRANGE(0, 4); |
755 | ATA_IRQ_MASK = BIT(0); | 757 | ATA_IRQ_MASK = BIT(0); |
756 | ATA_COMMAND = BIT(0); | 758 | ATA_COMMAND = BIT(0); |
757 | if (wakeup_wait(&ata_wakeup, 500000 * HZ / 1000000) == OBJ_WAIT_TIMEDOUT) | 759 | if (semaphore_wait(&ata_wakeup, 500000 * HZ / 1000000) |
760 | == OBJ_WAIT_TIMEDOUT) | ||
758 | { | 761 | { |
759 | ATA_COMMAND = BIT(1); | 762 | ATA_COMMAND = BIT(1); |
760 | ATA_CFG &= ~(BITRANGE(2, 3) | BIT(12)); | 763 | ATA_CFG &= ~(BITRANGE(2, 3) | BIT(12)); |
@@ -1068,9 +1071,9 @@ void ata_bbt_reload(void) | |||
1068 | int ata_init(void) | 1071 | int ata_init(void) |
1069 | { | 1072 | { |
1070 | mutex_init(&ata_mutex); | 1073 | mutex_init(&ata_mutex); |
1071 | wakeup_init(&ata_wakeup); | 1074 | semaphore_init(&ata_wakeup, 1, 0); |
1072 | wakeup_init(&mmc_wakeup); | 1075 | semaphore_init(&mmc_wakeup, 1, 0); |
1073 | wakeup_init(&mmc_comp_wakeup); | 1076 | semaphore_init(&mmc_comp_wakeup, 1, 0); |
1074 | ceata = PDAT(11) & BIT(1); | 1077 | ceata = PDAT(11) & BIT(1); |
1075 | if (ceata) | 1078 | if (ceata) |
1076 | { | 1079 | { |
@@ -1129,14 +1132,14 @@ void INT_ATA(void) | |||
1129 | { | 1132 | { |
1130 | uint32_t ata_irq = ATA_IRQ; | 1133 | uint32_t ata_irq = ATA_IRQ; |
1131 | ATA_IRQ = ata_irq; | 1134 | ATA_IRQ = ata_irq; |
1132 | if (ata_irq & ATA_IRQ_MASK) wakeup_signal(&ata_wakeup); | 1135 | if (ata_irq & ATA_IRQ_MASK) semaphore_release(&ata_wakeup); |
1133 | ATA_IRQ_MASK = 0; | 1136 | ATA_IRQ_MASK = 0; |
1134 | } | 1137 | } |
1135 | 1138 | ||
1136 | void INT_MMC(void) | 1139 | void INT_MMC(void) |
1137 | { | 1140 | { |
1138 | uint32_t irq = SDCI_IRQ; | 1141 | uint32_t irq = SDCI_IRQ; |
1139 | if (irq & SDCI_IRQ_DAT_DONE_INT) wakeup_signal(&mmc_wakeup); | 1142 | if (irq & SDCI_IRQ_DAT_DONE_INT) semaphore_release(&mmc_wakeup); |
1140 | if (irq & SDCI_IRQ_IOCARD_IRQ_INT) wakeup_signal(&mmc_comp_wakeup); | 1143 | if (irq & SDCI_IRQ_IOCARD_IRQ_INT) semaphore_release(&mmc_comp_wakeup); |
1141 | SDCI_IRQ = irq; | 1144 | SDCI_IRQ = irq; |
1142 | } | 1145 | } |