1 files changed, 308 insertions, 308 deletions
diff --git a/firmware/target/arm/s5l8700/postmortemstub.S b/firmware/target/arm/s5l8700/postmortemstub.S
index 73f192a553..d0874c418b 100644
--- a/firmware/target/arm/s5l8700/postmortemstub.S
+++ b/firmware/target/arm/s5l8700/postmortemstub.S
@@ -1,308 +1,308 @@
-.section .text.post_mortem_stub, "ax", %progbits
+.section .text.post_mortem_stub, "ax", %progbits
-.align 4
+.align 4
-.global post_mortem_stub
+.global post_mortem_stub
-.type post_mortem_stub, %function
+.type post_mortem_stub, %function
-post_mortem_stub:
+post_mortem_stub:
-MSR CPSR_c, #0xD3          @ Supervisor mode, no IRQs, no FIQs
+MSR CPSR_c, #0xD3          @ Supervisor mode, no IRQs, no FIQs
-MRC p15, 0, R0,c1,c0
+MRC p15, 0, R0,c1,c0
-BIC R0, R0, #5
+BIC R0, R0, #5
-MCR p15, 0, R0,c1,c0       @ Disable the Protection Unit and DCache
+MCR p15, 0, R0,c1,c0       @ Disable the Protection Unit and DCache
-MOV R13, #0
+MOV R13, #0
-pms_flushcache_loop:
+pms_flushcache_loop:
-  MCR p15, 0, R13,c7,c14,2
+  MCR p15, 0, R13,c7,c14,2
-  ADD R0, R13, #0x10
+  ADD R0, R13, #0x10
-  MCR p15, 0, R0,c7,c14,2
+  MCR p15, 0, R0,c7,c14,2
-  ADD R0, R0, #0x10
+  ADD R0, R0, #0x10
-  MCR p15, 0, R0,c7,c14,2
+  MCR p15, 0, R0,c7,c14,2
-  ADD R0, R0, #0x10
+  ADD R0, R0, #0x10
-  MCR p15, 0, R0,c7,c14,2
+  MCR p15, 0, R0,c7,c14,2
-  ADDS R13, R13, #0x04000000
+  ADDS R13, R13, #0x04000000
-BNE pms_flushcache_loop
+BNE pms_flushcache_loop
-MCR p15, 0, R13,c7,c10,4
+MCR p15, 0, R13,c7,c10,4
-LDR R7, pms_00080200
+LDR R7, pms_00080200
-ORR R8, R7, #0x8000
+ORR R8, R7, #0x8000
-ADR R9, pms_recvbuf
+ADR R9, pms_recvbuf
-LDR R10, pms_20080040
+LDR R10, pms_20080040
-MOV R11, #0x38800000
+MOV R11, #0x38800000
-MOV R12, #1
+MOV R12, #1
-MOV R2, #0x3C400000
+MOV R2, #0x3C400000
-ADD R1, R2, #0x00100000    @ Enable USB clocks
+ADD R1, R2, #0x00100000    @ Enable USB clocks
-LDR R0, [R1,#0x28]
+LDR R0, [R1,#0x28]
-BIC R0, R0, #0x4000
+BIC R0, R0, #0x4000
-STR R0, [R1,#0x28]
+STR R0, [R1,#0x28]
-LDR R0, [R1,#0x40]
+LDR R0, [R1,#0x40]
-BIC R0, R0, #0x800
+BIC R0, R0, #0x800
-STR R0, [R1,#0x40]
+STR R0, [R1,#0x40]
-LDR R0, pms_20803180       @ Clocking config
+LDR R0, pms_20803180       @ Clocking config
-STR R0, [R1]
+STR R0, [R1]
-MOV R0, #0x280
+MOV R0, #0x280
-STR R0, [R1,#0x3C]
+STR R0, [R1,#0x3C]
-MRC p15, 0, R0,c1,c0
+MRC p15, 0, R0,c1,c0
-ORR R0, R0, #0xc0000000
+ORR R0, R0, #0xc0000000
-MCR p15, 0, R0,c1,c0       @ Asynchronous mode
+MCR p15, 0, R0,c1,c0       @ Asynchronous mode
-STR R13, [R11,#0xE00]        @ PHY clock enable
+STR R13, [R11,#0xE00]        @ PHY clock enable
-MOV R1, #0x800
+MOV R1, #0x800
-ORR R0, R2, #2
+ORR R0, R2, #2
-STR R0, [R11,#0x804]        @ USB2 Gadget: Soft disconnect
+STR R0, [R11,#0x804]        @ USB2 Gadget: Soft disconnect
-STR R13, [R2]              @ USB2 PHY: Power on
+STR R13, [R2]              @ USB2 PHY: Power on
-STR R12, [R2,#0x08]         @ USB2 PHY: Assert Software Reset
+STR R12, [R2,#0x08]         @ USB2 PHY: Assert Software Reset
-MOV R0, #0x10000
+MOV R0, #0x10000
-pms_wait:
+pms_wait:
-SUBS R0, R0, #1
+SUBS R0, R0, #1
-BNE pms_wait
+BNE pms_wait
-STR R13, [R2,#0x08]         @ USB2 PHY: Deassert Software Reset
+STR R13, [R2,#0x08]         @ USB2 PHY: Deassert Software Reset
-STR R13, [R2,#0x04]         @ USB2 PHY: Clock is 48MHz
+STR R13, [R2,#0x04]         @ USB2 PHY: Clock is 48MHz
-STR R12, [R11,#0x10]        @ USB2 Gadget: Assert Core Software Reset
+STR R12, [R11,#0x10]        @ USB2 Gadget: Assert Core Software Reset
-pms_waitcorereset:
+pms_waitcorereset:
-LDR R0, [R11,#0x10]         @ USB2 Gadget: Wait for Core to reset
+LDR R0, [R11,#0x10]         @ USB2 Gadget: Wait for Core to reset
-TST R0, #1
+TST R0, #1
-BNE pms_waitcorereset
+BNE pms_waitcorereset
-TST R0, #0x80000000        @ USB2 Gadget: Wait for AHB IDLE
+TST R0, #0x80000000        @ USB2 Gadget: Wait for AHB IDLE
-BEQ pms_waitcorereset
+BEQ pms_waitcorereset
-MOV R0, #0x200
+MOV R0, #0x200
-STR R0, [R11,#0x24]         @ USB2 Gadget: RX FIFO size: 512 bytes
+STR R0, [R11,#0x24]         @ USB2 Gadget: RX FIFO size: 512 bytes
-ORR R0, R0, #0x2000000
+ORR R0, R0, #0x2000000
-STR R0, [R11,#0x28]         @ USB2 Gadget: Non-periodic TX FIFO size: 512 bytes
+STR R0, [R11,#0x28]         @ USB2 Gadget: Non-periodic TX FIFO size: 512 bytes
-MOV R0, #0x26
+MOV R0, #0x26
-STR R0, [R11,#0x08]         @ USB2 Gadget: DMA Enable, Burst Length: 4, Mask Interrupts
+STR R0, [R11,#0x08]         @ USB2 Gadget: DMA Enable, Burst Length: 4, Mask Interrupts
-MOV R0, #0x1400
+MOV R0, #0x1400
-ADD R0, R0, #8
+ADD R0, R0, #8
-STR R0, [R11,#0x0C]         @ USB2 Gadget: PHY IF is 16bit, Turnaround 5
+STR R0, [R11,#0x0C]         @ USB2 Gadget: PHY IF is 16bit, Turnaround 5
-STR R1, [R11,#0x804]        @ USB2 Gadget: Soft reconnect
+STR R1, [R11,#0x804]        @ USB2 Gadget: Soft reconnect
-ADR R14, pms_ctrlbuf
+ADR R14, pms_ctrlbuf
-ORR R5, R8, #0x84000000
+ORR R5, R8, #0x84000000
-@ fallthrough
+@ fallthrough
-pms_mainloop:
+pms_mainloop:
-  LDR R3, [R11,#0x14]         @ Global USB interrupts
+  LDR R3, [R11,#0x14]         @ Global USB interrupts
-  TST R3, #0x00001000        @ BUS reset
+  TST R3, #0x00001000        @ BUS reset
-  BEQ pms_noreset
+  BEQ pms_noreset
-    MOV R0, #0x500
+    MOV R0, #0x500
-    STR R0, [R11,#0x804]
+    STR R0, [R11,#0x804]
-    MOV R0, #4
+    MOV R0, #4
-    STR R0, [R11,#0x800]        @ USB2 Gadget: Device Address 0, STALL on non-zero length status stage
+    STR R0, [R11,#0x800]        @ USB2 Gadget: Device Address 0, STALL on non-zero length status stage
-    MOV R0, #0x8000
+    MOV R0, #0x8000
-    STR R0, [R11,#0x900]        @ USB2 Gadget: Endpoint 0 IN Control: ACTIVE
+    STR R0, [R11,#0x900]        @ USB2 Gadget: Endpoint 0 IN Control: ACTIVE
-    STR R10, [R11,#0xB10]        @ USB2 Gadget: Endpoint 0 OUT Transfer Size: 64 Bytes, 1 Packet, 1 Setup Packet
+    STR R10, [R11,#0xB10]        @ USB2 Gadget: Endpoint 0 OUT Transfer Size: 64 Bytes, 1 Packet, 1 Setup Packet
-    STR R14, [R11,#0xB14]        @ USB2 Gadget: Endpoint 0 OUT DMA Address: pms_ctrlbuf
+    STR R14, [R11,#0xB14]        @ USB2 Gadget: Endpoint 0 OUT DMA Address: pms_ctrlbuf
-    ORR R6, R0, #0x84000000
+    ORR R6, R0, #0x84000000
-    STR R6, [R11,#0xB00]        @ USB2 Gadget: Endpoint 0 OUT Control: ENABLE CLEARNAK
+    STR R6, [R11,#0xB00]        @ USB2 Gadget: Endpoint 0 OUT Control: ENABLE CLEARNAK
-    STR R8, [R11,#0x960]        @ USB2 Gadget: Endpoint 3 IN Control: ACTIVE BULK, 512 byte packets
+    STR R8, [R11,#0x960]        @ USB2 Gadget: Endpoint 3 IN Control: ACTIVE BULK, 512 byte packets
-    STR R8, [R11,#0xB80]        @ USB2 Gadget: Endpoint 4 OUT Control: ACTIVE BULK, 512 byte packets
+    STR R8, [R11,#0xB80]        @ USB2 Gadget: Endpoint 4 OUT Control: ACTIVE BULK, 512 byte packets
-    STR R7, [R11,#0xB90]        @ USB2 Gadget: Endpoint 4 OUT Transfer Size: 512 Bytes, 1 Packet
+    STR R7, [R11,#0xB90]        @ USB2 Gadget: Endpoint 4 OUT Transfer Size: 512 Bytes, 1 Packet
-    STR R9, [R11,#0xB94]        @ USB2 Gadget: Endpoint 4 OUT DMA Address: pms_recvbuf
+    STR R9, [R11,#0xB94]        @ USB2 Gadget: Endpoint 4 OUT DMA Address: pms_recvbuf
-    ORR R4, R5, #0x10000000
+    ORR R4, R5, #0x10000000
-    STR R4, [R11,#0xB80]        @ USB2 Gadget: Endpoint 4 OUT Control: ENABLE CLEARNAK DATA0
+    STR R4, [R11,#0xB80]        @ USB2 Gadget: Endpoint 4 OUT Control: ENABLE CLEARNAK DATA0
-  pms_noreset:
+  pms_noreset:
-  LDR R0, [R11,#0x908]        @ Just ACK all IN events...
+  LDR R0, [R11,#0x908]        @ Just ACK all IN events...
-  STR R0, [R11,#0x908]
+  STR R0, [R11,#0x908]
-  LDR R0, [R11,#0x968]
+  LDR R0, [R11,#0x968]
-  STR R0, [R11,#0x968]
+  STR R0, [R11,#0x968]
-  LDR R2, [R11,#0xB08]
+  LDR R2, [R11,#0xB08]
-  MOVS R2, R2                @ Event on OUT EP0
+  MOVS R2, R2                @ Event on OUT EP0
-  BEQ pms_noep0out
+  BEQ pms_noep0out
-    TST R2, #8                 @ SETUP phase done
+    TST R2, #8                 @ SETUP phase done
-    BEQ pms_controldone
+    BEQ pms_controldone
-      LDRB R0, [R14,#1] @ Get request type
+      LDRB R0, [R14,#1] @ Get request type
-      CMP R0, #0
+      CMP R0, #0
-        BEQ pms_GET_STATUS
+        BEQ pms_GET_STATUS
-      CMP R0, #1
+      CMP R0, #1
-        BEQ pms_CLEAR_FEATURE
+        BEQ pms_CLEAR_FEATURE
-      CMP R0, #3
+      CMP R0, #3
-        BEQ pms_SET_FEATURE
+        BEQ pms_SET_FEATURE
-      CMP R0, #5
+      CMP R0, #5
-        BEQ pms_SET_ADDRESS
+        BEQ pms_SET_ADDRESS
-      CMP R0, #6
+      CMP R0, #6
-        BEQ pms_GET_DESCRIPTOR
+        BEQ pms_GET_DESCRIPTOR
-      CMP R0, #8
+      CMP R0, #8
-        BEQ pms_GET_CONFIGURATION
+        BEQ pms_GET_CONFIGURATION
-      CMP R0, #9
+      CMP R0, #9
-        BEQ pms_SET_CONFIGURATION
+        BEQ pms_SET_CONFIGURATION
-      pms_ctrlstall:
+      pms_ctrlstall:
-      LDR R0, [R11,#0x900]
+      LDR R0, [R11,#0x900]
-      ORR R0, R0, #0x00200000
+      ORR R0, R0, #0x00200000
-      STR R0, [R11,#0x900]        @ Stall IN EP0
+      STR R0, [R11,#0x900]        @ Stall IN EP0
-      LDR R0, [R11,#0xB00]
+      LDR R0, [R11,#0xB00]
-      ORR R0, R0, #0x00200000
+      ORR R0, R0, #0x00200000
-      STR R0, [R11,#0xB00]        @ Stall OUT EP0
+      STR R0, [R11,#0xB00]        @ Stall OUT EP0
-    pms_controldone:
+    pms_controldone:
-    STR R10, [R11,#0xB10]        @ OUT EP0: 64 Bytes, 1 Packet, 1 Setup Packet
+    STR R10, [R11,#0xB10]        @ OUT EP0: 64 Bytes, 1 Packet, 1 Setup Packet
-    STR R14, [R11,#0xB14]        @ OUT EP0: DMA address
+    STR R14, [R11,#0xB14]        @ OUT EP0: DMA address
-    STR R6, [R11,#0xB00]        @ OUT EP0: Enable ClearNAK
+    STR R6, [R11,#0xB00]        @ OUT EP0: Enable ClearNAK
-  pms_noep0out:
+  pms_noep0out:
-  STR R2, [R11,#0xB08]        @ ACK it, whatever it was...
+  STR R2, [R11,#0xB08]        @ ACK it, whatever it was...
-  LDR R2, [R11,#0xB88]
+  LDR R2, [R11,#0xB88]
-  MOVS R2, R2                @ Event on OUT EP4
+  MOVS R2, R2                @ Event on OUT EP4
-  BEQ pms_noep1out
+  BEQ pms_noep1out
-    TST R2, #1                 @ XFER complete
+    TST R2, #1                 @ XFER complete
-    BEQ pms_datadone
+    BEQ pms_datadone
-      LDR R0, pms_000001FF
+      LDR R0, pms_000001FF
-      LDR R1, pms_recvbuf+4
+      LDR R1, pms_recvbuf+4
-      ADD R0, R0, R1
+      ADD R0, R0, R1
-      MOV R0, R0,LSR#9
+      MOV R0, R0,LSR#9
-      ORR R1, R1, R0,LSL#19      @ Number of packets
+      ORR R1, R1, R0,LSL#19      @ Number of packets
-      LDR R0, pms_recvbuf
+      LDR R0, pms_recvbuf
-      STR R1, [R11,#0x970]        @ EP3 IN: Number of packets, size
+      STR R1, [R11,#0x970]        @ EP3 IN: Number of packets, size
-      STR R0, [R11,#0x974]        @ EP3 IN: DMA address
+      STR R0, [R11,#0x974]        @ EP3 IN: DMA address
-      STR R5, [R11,#0x960]        @ EP3 IN: Enable ClearNAK
+      STR R5, [R11,#0x960]        @ EP3 IN: Enable ClearNAK
-    pms_datadone:
+    pms_datadone:
-    STR R7, [R11,#0xB90]        @ OUT EP4: 512 Bytes, 1 Packet
+    STR R7, [R11,#0xB90]        @ OUT EP4: 512 Bytes, 1 Packet
-    STR R9, [R11,#0xB94]        @ Out EP4: DMA address
+    STR R9, [R11,#0xB94]        @ Out EP4: DMA address
-    STR R5, [R11,#0xB80]        @ Out EP4: Enable ClearNAK
+    STR R5, [R11,#0xB80]        @ Out EP4: Enable ClearNAK
-  pms_noep1out:
+  pms_noep1out:
-  STR R2, [R11,#0xB88]        @ ACK it, whatever it was...
+  STR R2, [R11,#0xB88]        @ ACK it, whatever it was...
-  STR R3, [R11,#0x14]         @ ACK global ints
+  STR R3, [R11,#0x14]         @ ACK global ints
-B pms_mainloop
+B pms_mainloop
-pms_CLEAR_FEATURE:
+pms_CLEAR_FEATURE:
-  LDRB R0, [R14]
+  LDRB R0, [R14]
-  CMP R0, #2
+  CMP R0, #2
-  LDREQ R0, [R14,#2]
+  LDREQ R0, [R14,#2]
-  BICEQ R0, R0, #0x00800000
+  BICEQ R0, R0, #0x00800000
-  CMPEQ R0, #0x00010000
+  CMPEQ R0, #0x00010000
-@ fallthrough
+@ fallthrough
-pms_SET_CONFIGURATION:
+pms_SET_CONFIGURATION:
-  ORREQ R0, R8, #0x10000000
+  ORREQ R0, R8, #0x10000000
-  STREQ R0, [R11,#0x960]      @ EP3 IN: Set DATA0 PID
+  STREQ R0, [R11,#0x960]      @ EP3 IN: Set DATA0 PID
-  STREQ R4, [R11,#0xB80]      @ EP4 OUT: Set DATA0 PID
+  STREQ R4, [R11,#0xB80]      @ EP4 OUT: Set DATA0 PID
-B pms_SET_FEATURE              @ zero-length ACK
+B pms_SET_FEATURE              @ zero-length ACK
-pms_GET_CONFIGURATION:
+pms_GET_CONFIGURATION:
-  MOV R1, #1
+  MOV R1, #1
-  STR R1, [R14]
+  STR R1, [R14]
-@ fallthrough
+@ fallthrough
-pms_ctrlsend:
+pms_ctrlsend:
-  ORR R0, R1, #0x00080000    @ 1 Packet
+  ORR R0, R1, #0x00080000    @ 1 Packet
-  STR R0, [R11,#0x910]        @ EP0 IN: 1 Packet, Size as in R1
+  STR R0, [R11,#0x910]        @ EP0 IN: 1 Packet, Size as in R1
-  STR R14, [R11,#0x914]        @ EP0 IN: DMA address
+  STR R14, [R11,#0x914]        @ EP0 IN: DMA address
-  ORR R0, R6, #0x1800
+  ORR R0, R6, #0x1800
-  STR R0, [R11,#0x900]        @ EP0 IN: Enable ClearNAK
+  STR R0, [R11,#0x900]        @ EP0 IN: Enable ClearNAK
-  ADR R14, pms_ctrlbuf
+  ADR R14, pms_ctrlbuf
-B pms_controldone
+B pms_controldone
-pms_GET_DESCRIPTOR:
+pms_GET_DESCRIPTOR:
-  LDRB R0, [R14,#3]           @ Descriptor type
+  LDRB R0, [R14,#3]           @ Descriptor type
-  CMP R0, #1
+  CMP R0, #1
-    ADREQ R14, pms_devicedescriptor
+    ADREQ R14, pms_devicedescriptor
-    BEQ pms_senddescriptor
+    BEQ pms_senddescriptor
-  CMP R0, #2
+  CMP R0, #2
-    ADREQ R14, pms_configurationdescriptor
+    ADREQ R14, pms_configurationdescriptor
-    MOVEQ R1, #0x20
+    MOVEQ R1, #0x20
-    BEQ pms_senddescriptorcustomsize
+    BEQ pms_senddescriptorcustomsize
-  CMP R0, #3
+  CMP R0, #3
-  BNE pms_ctrlstall
+  BNE pms_ctrlstall
-  LDRB R0, [R14,#2]           @ String descriptor index
+  LDRB R0, [R14,#2]           @ String descriptor index
-  CMP R0, #0
+  CMP R0, #0
-    LDREQ R0, pms_langstringdescriptor
+    LDREQ R0, pms_langstringdescriptor
-    STREQ R0, [R14]
+    STREQ R0, [R14]
-    BEQ pms_senddescriptor
+    BEQ pms_senddescriptor
-  CMP R0, #1
+  CMP R0, #1
-  CMPNE R0, #2
+  CMPNE R0, #2
-    ADREQ R14, pms_devnamestringdescriptor
+    ADREQ R14, pms_devnamestringdescriptor
-  BNE pms_ctrlstall
+  BNE pms_ctrlstall
-@ fallthrough
+@ fallthrough
-pms_senddescriptor:
+pms_senddescriptor:
-  LDRB R1, [R14]              @ Descriptor length
+  LDRB R1, [R14]              @ Descriptor length
-@ fallthrough
+@ fallthrough
-pms_senddescriptorcustomsize:
+pms_senddescriptorcustomsize:
-  LDRH R0, pms_ctrlbuf+6        @ Requested length
+  LDRH R0, pms_ctrlbuf+6        @ Requested length
-  CMP R0, R1
+  CMP R0, R1
-  MOVLO R1, R0
+  MOVLO R1, R0
-B pms_ctrlsend
+B pms_ctrlsend
-pms_SET_ADDRESS:
+pms_SET_ADDRESS:
-  LDRH R1, [R14,#2]        @ new address
+  LDRH R1, [R14,#2]        @ new address
-  LDR R0, [R11,#0x800]
+  LDR R0, [R11,#0x800]
-  BIC R0, R0, #0x000007F0
+  BIC R0, R0, #0x000007F0
-  ORR R0, R0, R1,LSL#4
+  ORR R0, R0, R1,LSL#4
-  STR R0, [R11,#0x800]        @ set new address
+  STR R0, [R11,#0x800]        @ set new address
-@ fallthrough
+@ fallthrough
-pms_SET_FEATURE:
+pms_SET_FEATURE:
-  MOV R1, #0                 @ zero-length ACK
+  MOV R1, #0                 @ zero-length ACK
-B pms_ctrlsend
+B pms_ctrlsend
-pms_20803180:
+pms_20803180:
-.word 0x20803180
+.word 0x20803180
-.ltorg
+.ltorg
-.align 4
+.align 4
-pms_configurationdescriptor:
+pms_configurationdescriptor:
-.word 0x00200209
+.word 0x00200209
-.word 0xC0000101
+.word 0xC0000101
-.word 0x00040932
+.word 0x00040932
-.word 0xFFFF0200
+.word 0xFFFF0200
-.word 0x050700FF
+.word 0x050700FF
-.word 0x02000204
+.word 0x02000204
-.word 0x83050701
+.word 0x83050701
-.word 0x01020002
+.word 0x01020002
-pms_devicedescriptor:
+pms_devicedescriptor:
-.word 0x02000112
+.word 0x02000112
-.word 0x40FFFFFF
+.word 0x40FFFFFF
-.word 0xA112FFFF
+.word 0xA112FFFF
-.word 0x02010001
+.word 0x02010001
-.word 0x00010100
+.word 0x00010100
-pms_00080200:
+pms_00080200:
-.word 0x00080200
+.word 0x00080200
-pms_20080040:
+pms_20080040:
-.word 0x20080040
+.word 0x20080040
-pms_000001FF:
+pms_000001FF:
-.word 0x000001FF
+.word 0x000001FF
-pms_devnamestringdescriptor:
+pms_devnamestringdescriptor:
-.word 0x0052030C
+.word 0x0052030C
-.word 0x00500042
+.word 0x00500042
-.word 0x0053004D
+.word 0x0053004D
-pms_langstringdescriptor:
+pms_langstringdescriptor:
-.word 0x04090304
+.word 0x04090304
-pms_ctrlbuf:
+pms_ctrlbuf:
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-.word 0
+.word 0
-pms_recvbuf:
+pms_recvbuf:
-.word 0
+.word 0
-.word 0
+.word 0
-pms_GET_STATUS:
+pms_GET_STATUS:
-  LDRB R0, [R14]
+  LDRB R0, [R14]
-  CMP R0, #0x80
+  CMP R0, #0x80
-  STREQ R12, [R14]
+  STREQ R12, [R14]
-  STRNE R13, [R14]
+  STRNE R13, [R14]
-  MOV R1, #2
+  MOV R1, #2
-B pms_ctrlsend
+B pms_ctrlsend
-.size post_mortem_stub, .-post_mortem_stub
+.size post_mortem_stub, .-post_mortem_stub

diff --git a/firmware/target/arm/s5l8700/postmortemstub.S b/firmware/target/arm/s5l8700/postmortemstub.S index 73f192a553..d0874c418b 100644 --- a/firmware/target/arm/s5l8700/postmortemstub.S +++ b/firmware/target/arm/s5l8700/postmortemstub.S
@@ -1,308 +1,308 @@
1	.section .text.post_mortem_stub, "ax", %progbits	1	.section .text.post_mortem_stub, "ax", %progbits
2	.align 4	2	.align 4
3	.global post_mortem_stub	3	.global post_mortem_stub
4	.type post_mortem_stub, %function	4	.type post_mortem_stub, %function
5	post_mortem_stub:	5	post_mortem_stub:
6	MSR CPSR_c, #0xD3 @ Supervisor mode, no IRQs, no FIQs	6	MSR CPSR_c, #0xD3 @ Supervisor mode, no IRQs, no FIQs
7	MRC p15, 0, R0,c1,c0	7	MRC p15, 0, R0,c1,c0
8	BIC R0, R0, #5	8	BIC R0, R0, #5
9	MCR p15, 0, R0,c1,c0 @ Disable the Protection Unit and DCache	9	MCR p15, 0, R0,c1,c0 @ Disable the Protection Unit and DCache
10	MOV R13, #0	10	MOV R13, #0
11	pms_flushcache_loop:	11	pms_flushcache_loop:
12	MCR p15, 0, R13,c7,c14,2	12	MCR p15, 0, R13,c7,c14,2
13	ADD R0, R13, #0x10	13	ADD R0, R13, #0x10
14	MCR p15, 0, R0,c7,c14,2	14	MCR p15, 0, R0,c7,c14,2
15	ADD R0, R0, #0x10	15	ADD R0, R0, #0x10
16	MCR p15, 0, R0,c7,c14,2	16	MCR p15, 0, R0,c7,c14,2
17	ADD R0, R0, #0x10	17	ADD R0, R0, #0x10
18	MCR p15, 0, R0,c7,c14,2	18	MCR p15, 0, R0,c7,c14,2
19	ADDS R13, R13, #0x04000000	19	ADDS R13, R13, #0x04000000
20	BNE pms_flushcache_loop	20	BNE pms_flushcache_loop
21	MCR p15, 0, R13,c7,c10,4	21	MCR p15, 0, R13,c7,c10,4
22		22
23	LDR R7, pms_00080200	23	LDR R7, pms_00080200
24	ORR R8, R7, #0x8000	24	ORR R8, R7, #0x8000
25	ADR R9, pms_recvbuf	25	ADR R9, pms_recvbuf
26	LDR R10, pms_20080040	26	LDR R10, pms_20080040
27	MOV R11, #0x38800000	27	MOV R11, #0x38800000
28	MOV R12, #1	28	MOV R12, #1
29		29
30	MOV R2, #0x3C400000	30	MOV R2, #0x3C400000
31	ADD R1, R2, #0x00100000 @ Enable USB clocks	31	ADD R1, R2, #0x00100000 @ Enable USB clocks
32	LDR R0, [R1,#0x28]	32	LDR R0, [R1,#0x28]
33	BIC R0, R0, #0x4000	33	BIC R0, R0, #0x4000
34	STR R0, [R1,#0x28]	34	STR R0, [R1,#0x28]
35	LDR R0, [R1,#0x40]	35	LDR R0, [R1,#0x40]
36	BIC R0, R0, #0x800	36	BIC R0, R0, #0x800
37	STR R0, [R1,#0x40]	37	STR R0, [R1,#0x40]
38	LDR R0, pms_20803180 @ Clocking config	38	LDR R0, pms_20803180 @ Clocking config
39	STR R0, [R1]	39	STR R0, [R1]
40	MOV R0, #0x280	40	MOV R0, #0x280
41	STR R0, [R1,#0x3C]	41	STR R0, [R1,#0x3C]
42	MRC p15, 0, R0,c1,c0	42	MRC p15, 0, R0,c1,c0
43	ORR R0, R0, #0xc0000000	43	ORR R0, R0, #0xc0000000
44	MCR p15, 0, R0,c1,c0 @ Asynchronous mode	44	MCR p15, 0, R0,c1,c0 @ Asynchronous mode
45		45
46	STR R13, [R11,#0xE00] @ PHY clock enable	46	STR R13, [R11,#0xE00] @ PHY clock enable
47		47
48	MOV R1, #0x800	48	MOV R1, #0x800
49	ORR R0, R2, #2	49	ORR R0, R2, #2
50	STR R0, [R11,#0x804] @ USB2 Gadget: Soft disconnect	50	STR R0, [R11,#0x804] @ USB2 Gadget: Soft disconnect
51		51
52	STR R13, [R2] @ USB2 PHY: Power on	52	STR R13, [R2] @ USB2 PHY: Power on
53	STR R12, [R2,#0x08] @ USB2 PHY: Assert Software Reset	53	STR R12, [R2,#0x08] @ USB2 PHY: Assert Software Reset
54	MOV R0, #0x10000	54	MOV R0, #0x10000
55	pms_wait:	55	pms_wait:
56	SUBS R0, R0, #1	56	SUBS R0, R0, #1
57	BNE pms_wait	57	BNE pms_wait
58	STR R13, [R2,#0x08] @ USB2 PHY: Deassert Software Reset	58	STR R13, [R2,#0x08] @ USB2 PHY: Deassert Software Reset
59	STR R13, [R2,#0x04] @ USB2 PHY: Clock is 48MHz	59	STR R13, [R2,#0x04] @ USB2 PHY: Clock is 48MHz
60		60
61	STR R12, [R11,#0x10] @ USB2 Gadget: Assert Core Software Reset	61	STR R12, [R11,#0x10] @ USB2 Gadget: Assert Core Software Reset
62	pms_waitcorereset:	62	pms_waitcorereset:
63	LDR R0, [R11,#0x10] @ USB2 Gadget: Wait for Core to reset	63	LDR R0, [R11,#0x10] @ USB2 Gadget: Wait for Core to reset
64	TST R0, #1	64	TST R0, #1
65	BNE pms_waitcorereset	65	BNE pms_waitcorereset
66	TST R0, #0x80000000 @ USB2 Gadget: Wait for AHB IDLE	66	TST R0, #0x80000000 @ USB2 Gadget: Wait for AHB IDLE
67	BEQ pms_waitcorereset	67	BEQ pms_waitcorereset
68		68
69	MOV R0, #0x200	69	MOV R0, #0x200
70	STR R0, [R11,#0x24] @ USB2 Gadget: RX FIFO size: 512 bytes	70	STR R0, [R11,#0x24] @ USB2 Gadget: RX FIFO size: 512 bytes
71	ORR R0, R0, #0x2000000	71	ORR R0, R0, #0x2000000
72	STR R0, [R11,#0x28] @ USB2 Gadget: Non-periodic TX FIFO size: 512 bytes	72	STR R0, [R11,#0x28] @ USB2 Gadget: Non-periodic TX FIFO size: 512 bytes
73	MOV R0, #0x26	73	MOV R0, #0x26
74	STR R0, [R11,#0x08] @ USB2 Gadget: DMA Enable, Burst Length: 4, Mask Interrupts	74	STR R0, [R11,#0x08] @ USB2 Gadget: DMA Enable, Burst Length: 4, Mask Interrupts
75	MOV R0, #0x1400	75	MOV R0, #0x1400
76	ADD R0, R0, #8	76	ADD R0, R0, #8
77	STR R0, [R11,#0x0C] @ USB2 Gadget: PHY IF is 16bit, Turnaround 5	77	STR R0, [R11,#0x0C] @ USB2 Gadget: PHY IF is 16bit, Turnaround 5
78	STR R1, [R11,#0x804] @ USB2 Gadget: Soft reconnect	78	STR R1, [R11,#0x804] @ USB2 Gadget: Soft reconnect
79		79
80	ADR R14, pms_ctrlbuf	80	ADR R14, pms_ctrlbuf
81	ORR R5, R8, #0x84000000	81	ORR R5, R8, #0x84000000
82	@ fallthrough	82	@ fallthrough
83		83
84	pms_mainloop:	84	pms_mainloop:
85	LDR R3, [R11,#0x14] @ Global USB interrupts	85	LDR R3, [R11,#0x14] @ Global USB interrupts
86	TST R3, #0x00001000 @ BUS reset	86	TST R3, #0x00001000 @ BUS reset
87	BEQ pms_noreset	87	BEQ pms_noreset
88	MOV R0, #0x500	88	MOV R0, #0x500
89	STR R0, [R11,#0x804]	89	STR R0, [R11,#0x804]
90	MOV R0, #4	90	MOV R0, #4
91	STR R0, [R11,#0x800] @ USB2 Gadget: Device Address 0, STALL on non-zero length status stage	91	STR R0, [R11,#0x800] @ USB2 Gadget: Device Address 0, STALL on non-zero length status stage
92	MOV R0, #0x8000	92	MOV R0, #0x8000
93	STR R0, [R11,#0x900] @ USB2 Gadget: Endpoint 0 IN Control: ACTIVE	93	STR R0, [R11,#0x900] @ USB2 Gadget: Endpoint 0 IN Control: ACTIVE
94	STR R10, [R11,#0xB10] @ USB2 Gadget: Endpoint 0 OUT Transfer Size: 64 Bytes, 1 Packet, 1 Setup Packet	94	STR R10, [R11,#0xB10] @ USB2 Gadget: Endpoint 0 OUT Transfer Size: 64 Bytes, 1 Packet, 1 Setup Packet
95	STR R14, [R11,#0xB14] @ USB2 Gadget: Endpoint 0 OUT DMA Address: pms_ctrlbuf	95	STR R14, [R11,#0xB14] @ USB2 Gadget: Endpoint 0 OUT DMA Address: pms_ctrlbuf
96	ORR R6, R0, #0x84000000	96	ORR R6, R0, #0x84000000
97	STR R6, [R11,#0xB00] @ USB2 Gadget: Endpoint 0 OUT Control: ENABLE CLEARNAK	97	STR R6, [R11,#0xB00] @ USB2 Gadget: Endpoint 0 OUT Control: ENABLE CLEARNAK
98	STR R8, [R11,#0x960] @ USB2 Gadget: Endpoint 3 IN Control: ACTIVE BULK, 512 byte packets	98	STR R8, [R11,#0x960] @ USB2 Gadget: Endpoint 3 IN Control: ACTIVE BULK, 512 byte packets
99	STR R8, [R11,#0xB80] @ USB2 Gadget: Endpoint 4 OUT Control: ACTIVE BULK, 512 byte packets	99	STR R8, [R11,#0xB80] @ USB2 Gadget: Endpoint 4 OUT Control: ACTIVE BULK, 512 byte packets
100	STR R7, [R11,#0xB90] @ USB2 Gadget: Endpoint 4 OUT Transfer Size: 512 Bytes, 1 Packet	100	STR R7, [R11,#0xB90] @ USB2 Gadget: Endpoint 4 OUT Transfer Size: 512 Bytes, 1 Packet
101	STR R9, [R11,#0xB94] @ USB2 Gadget: Endpoint 4 OUT DMA Address: pms_recvbuf	101	STR R9, [R11,#0xB94] @ USB2 Gadget: Endpoint 4 OUT DMA Address: pms_recvbuf
102	ORR R4, R5, #0x10000000	102	ORR R4, R5, #0x10000000
103	STR R4, [R11,#0xB80] @ USB2 Gadget: Endpoint 4 OUT Control: ENABLE CLEARNAK DATA0	103	STR R4, [R11,#0xB80] @ USB2 Gadget: Endpoint 4 OUT Control: ENABLE CLEARNAK DATA0
104	pms_noreset:	104	pms_noreset:
105	LDR R0, [R11,#0x908] @ Just ACK all IN events...	105	LDR R0, [R11,#0x908] @ Just ACK all IN events...
106	STR R0, [R11,#0x908]	106	STR R0, [R11,#0x908]
107	LDR R0, [R11,#0x968]	107	LDR R0, [R11,#0x968]
108	STR R0, [R11,#0x968]	108	STR R0, [R11,#0x968]
109	LDR R2, [R11,#0xB08]	109	LDR R2, [R11,#0xB08]
110	MOVS R2, R2 @ Event on OUT EP0	110	MOVS R2, R2 @ Event on OUT EP0
111	BEQ pms_noep0out	111	BEQ pms_noep0out
112	TST R2, #8 @ SETUP phase done	112	TST R2, #8 @ SETUP phase done
113	BEQ pms_controldone	113	BEQ pms_controldone
114	LDRB R0, [R14,#1] @ Get request type	114	LDRB R0, [R14,#1] @ Get request type
115	CMP R0, #0	115	CMP R0, #0
116	BEQ pms_GET_STATUS	116	BEQ pms_GET_STATUS
117	CMP R0, #1	117	CMP R0, #1
118	BEQ pms_CLEAR_FEATURE	118	BEQ pms_CLEAR_FEATURE
119	CMP R0, #3	119	CMP R0, #3
120	BEQ pms_SET_FEATURE	120	BEQ pms_SET_FEATURE
121	CMP R0, #5	121	CMP R0, #5
122	BEQ pms_SET_ADDRESS	122	BEQ pms_SET_ADDRESS
123	CMP R0, #6	123	CMP R0, #6
124	BEQ pms_GET_DESCRIPTOR	124	BEQ pms_GET_DESCRIPTOR
125	CMP R0, #8	125	CMP R0, #8
126	BEQ pms_GET_CONFIGURATION	126	BEQ pms_GET_CONFIGURATION
127	CMP R0, #9	127	CMP R0, #9
128	BEQ pms_SET_CONFIGURATION	128	BEQ pms_SET_CONFIGURATION
129	pms_ctrlstall:	129	pms_ctrlstall:
130	LDR R0, [R11,#0x900]	130	LDR R0, [R11,#0x900]
131	ORR R0, R0, #0x00200000	131	ORR R0, R0, #0x00200000
132	STR R0, [R11,#0x900] @ Stall IN EP0	132	STR R0, [R11,#0x900] @ Stall IN EP0
133	LDR R0, [R11,#0xB00]	133	LDR R0, [R11,#0xB00]
134	ORR R0, R0, #0x00200000	134	ORR R0, R0, #0x00200000
135	STR R0, [R11,#0xB00] @ Stall OUT EP0	135	STR R0, [R11,#0xB00] @ Stall OUT EP0
136	pms_controldone:	136	pms_controldone:
137	STR R10, [R11,#0xB10] @ OUT EP0: 64 Bytes, 1 Packet, 1 Setup Packet	137	STR R10, [R11,#0xB10] @ OUT EP0: 64 Bytes, 1 Packet, 1 Setup Packet
138	STR R14, [R11,#0xB14] @ OUT EP0: DMA address	138	STR R14, [R11,#0xB14] @ OUT EP0: DMA address
139	STR R6, [R11,#0xB00] @ OUT EP0: Enable ClearNAK	139	STR R6, [R11,#0xB00] @ OUT EP0: Enable ClearNAK
140	pms_noep0out:	140	pms_noep0out:
141	STR R2, [R11,#0xB08] @ ACK it, whatever it was...	141	STR R2, [R11,#0xB08] @ ACK it, whatever it was...
142	LDR R2, [R11,#0xB88]	142	LDR R2, [R11,#0xB88]
143	MOVS R2, R2 @ Event on OUT EP4	143	MOVS R2, R2 @ Event on OUT EP4
144	BEQ pms_noep1out	144	BEQ pms_noep1out
145	TST R2, #1 @ XFER complete	145	TST R2, #1 @ XFER complete
146	BEQ pms_datadone	146	BEQ pms_datadone
147	LDR R0, pms_000001FF	147	LDR R0, pms_000001FF
148	LDR R1, pms_recvbuf+4	148	LDR R1, pms_recvbuf+4
149	ADD R0, R0, R1	149	ADD R0, R0, R1
150	MOV R0, R0,LSR#9	150	MOV R0, R0,LSR#9
151	ORR R1, R1, R0,LSL#19 @ Number of packets	151	ORR R1, R1, R0,LSL#19 @ Number of packets
152	LDR R0, pms_recvbuf	152	LDR R0, pms_recvbuf
153	STR R1, [R11,#0x970] @ EP3 IN: Number of packets, size	153	STR R1, [R11,#0x970] @ EP3 IN: Number of packets, size
154	STR R0, [R11,#0x974] @ EP3 IN: DMA address	154	STR R0, [R11,#0x974] @ EP3 IN: DMA address
155	STR R5, [R11,#0x960] @ EP3 IN: Enable ClearNAK	155	STR R5, [R11,#0x960] @ EP3 IN: Enable ClearNAK
156	pms_datadone:	156	pms_datadone:
157	STR R7, [R11,#0xB90] @ OUT EP4: 512 Bytes, 1 Packet	157	STR R7, [R11,#0xB90] @ OUT EP4: 512 Bytes, 1 Packet
158	STR R9, [R11,#0xB94] @ Out EP4: DMA address	158	STR R9, [R11,#0xB94] @ Out EP4: DMA address
159	STR R5, [R11,#0xB80] @ Out EP4: Enable ClearNAK	159	STR R5, [R11,#0xB80] @ Out EP4: Enable ClearNAK
160	pms_noep1out:	160	pms_noep1out:
161	STR R2, [R11,#0xB88] @ ACK it, whatever it was...	161	STR R2, [R11,#0xB88] @ ACK it, whatever it was...
162	STR R3, [R11,#0x14] @ ACK global ints	162	STR R3, [R11,#0x14] @ ACK global ints
163	B pms_mainloop	163	B pms_mainloop
164		164
165	pms_CLEAR_FEATURE:	165	pms_CLEAR_FEATURE:
166	LDRB R0, [R14]	166	LDRB R0, [R14]
167	CMP R0, #2	167	CMP R0, #2
168	LDREQ R0, [R14,#2]	168	LDREQ R0, [R14,#2]
169	BICEQ R0, R0, #0x00800000	169	BICEQ R0, R0, #0x00800000
170	CMPEQ R0, #0x00010000	170	CMPEQ R0, #0x00010000
171	@ fallthrough	171	@ fallthrough
172		172
173	pms_SET_CONFIGURATION:	173	pms_SET_CONFIGURATION:
174	ORREQ R0, R8, #0x10000000	174	ORREQ R0, R8, #0x10000000
175	STREQ R0, [R11,#0x960] @ EP3 IN: Set DATA0 PID	175	STREQ R0, [R11,#0x960] @ EP3 IN: Set DATA0 PID
176	STREQ R4, [R11,#0xB80] @ EP4 OUT: Set DATA0 PID	176	STREQ R4, [R11,#0xB80] @ EP4 OUT: Set DATA0 PID
177	B pms_SET_FEATURE @ zero-length ACK	177	B pms_SET_FEATURE @ zero-length ACK
178		178
179	pms_GET_CONFIGURATION:	179	pms_GET_CONFIGURATION:
180	MOV R1, #1	180	MOV R1, #1
181	STR R1, [R14]	181	STR R1, [R14]
182	@ fallthrough	182	@ fallthrough
183		183
184	pms_ctrlsend:	184	pms_ctrlsend:
185	ORR R0, R1, #0x00080000 @ 1 Packet	185	ORR R0, R1, #0x00080000 @ 1 Packet
186	STR R0, [R11,#0x910] @ EP0 IN: 1 Packet, Size as in R1	186	STR R0, [R11,#0x910] @ EP0 IN: 1 Packet, Size as in R1
187	STR R14, [R11,#0x914] @ EP0 IN: DMA address	187	STR R14, [R11,#0x914] @ EP0 IN: DMA address
188	ORR R0, R6, #0x1800	188	ORR R0, R6, #0x1800
189	STR R0, [R11,#0x900] @ EP0 IN: Enable ClearNAK	189	STR R0, [R11,#0x900] @ EP0 IN: Enable ClearNAK
190	ADR R14, pms_ctrlbuf	190	ADR R14, pms_ctrlbuf
191	B pms_controldone	191	B pms_controldone
192		192
193	pms_GET_DESCRIPTOR:	193	pms_GET_DESCRIPTOR:
194	LDRB R0, [R14,#3] @ Descriptor type	194	LDRB R0, [R14,#3] @ Descriptor type
195	CMP R0, #1	195	CMP R0, #1
196	ADREQ R14, pms_devicedescriptor	196	ADREQ R14, pms_devicedescriptor
197	BEQ pms_senddescriptor	197	BEQ pms_senddescriptor
198	CMP R0, #2	198	CMP R0, #2
199	ADREQ R14, pms_configurationdescriptor	199	ADREQ R14, pms_configurationdescriptor
200	MOVEQ R1, #0x20	200	MOVEQ R1, #0x20
201	BEQ pms_senddescriptorcustomsize	201	BEQ pms_senddescriptorcustomsize
202	CMP R0, #3	202	CMP R0, #3
203	BNE pms_ctrlstall	203	BNE pms_ctrlstall
204	LDRB R0, [R14,#2] @ String descriptor index	204	LDRB R0, [R14,#2] @ String descriptor index
205	CMP R0, #0	205	CMP R0, #0
206	LDREQ R0, pms_langstringdescriptor	206	LDREQ R0, pms_langstringdescriptor
207	STREQ R0, [R14]	207	STREQ R0, [R14]
208	BEQ pms_senddescriptor	208	BEQ pms_senddescriptor
209	CMP R0, #1	209	CMP R0, #1
210	CMPNE R0, #2	210	CMPNE R0, #2
211	ADREQ R14, pms_devnamestringdescriptor	211	ADREQ R14, pms_devnamestringdescriptor
212	BNE pms_ctrlstall	212	BNE pms_ctrlstall
213	@ fallthrough	213	@ fallthrough
214		214
215	pms_senddescriptor:	215	pms_senddescriptor:
216	LDRB R1, [R14] @ Descriptor length	216	LDRB R1, [R14] @ Descriptor length
217	@ fallthrough	217	@ fallthrough
218		218
219	pms_senddescriptorcustomsize:	219	pms_senddescriptorcustomsize:
220	LDRH R0, pms_ctrlbuf+6 @ Requested length	220	LDRH R0, pms_ctrlbuf+6 @ Requested length
221	CMP R0, R1	221	CMP R0, R1
222	MOVLO R1, R0	222	MOVLO R1, R0
223	B pms_ctrlsend	223	B pms_ctrlsend
224		224
225	pms_SET_ADDRESS:	225	pms_SET_ADDRESS:
226	LDRH R1, [R14,#2] @ new address	226	LDRH R1, [R14,#2] @ new address
227	LDR R0, [R11,#0x800]	227	LDR R0, [R11,#0x800]
228	BIC R0, R0, #0x000007F0	228	BIC R0, R0, #0x000007F0
229	ORR R0, R0, R1,LSL#4	229	ORR R0, R0, R1,LSL#4
230	STR R0, [R11,#0x800] @ set new address	230	STR R0, [R11,#0x800] @ set new address
231	@ fallthrough	231	@ fallthrough
232		232
233	pms_SET_FEATURE:	233	pms_SET_FEATURE:
234	MOV R1, #0 @ zero-length ACK	234	MOV R1, #0 @ zero-length ACK
235	B pms_ctrlsend	235	B pms_ctrlsend
236		236
237	pms_20803180:	237	pms_20803180:
238	.word 0x20803180	238	.word 0x20803180
239		239
240	.ltorg	240	.ltorg
241		241
242	.align 4	242	.align 4
243		243
244	pms_configurationdescriptor:	244	pms_configurationdescriptor:
245	.word 0x00200209	245	.word 0x00200209
246	.word 0xC0000101	246	.word 0xC0000101
247	.word 0x00040932	247	.word 0x00040932
248	.word 0xFFFF0200	248	.word 0xFFFF0200
249	.word 0x050700FF	249	.word 0x050700FF
250	.word 0x02000204	250	.word 0x02000204
251	.word 0x83050701	251	.word 0x83050701
252	.word 0x01020002	252	.word 0x01020002
253		253
254	pms_devicedescriptor:	254	pms_devicedescriptor:
255	.word 0x02000112	255	.word 0x02000112
256	.word 0x40FFFFFF	256	.word 0x40FFFFFF
257	.word 0xA112FFFF	257	.word 0xA112FFFF
258	.word 0x02010001	258	.word 0x02010001
259	.word 0x00010100	259	.word 0x00010100
260		260
261	pms_00080200:	261	pms_00080200:
262	.word 0x00080200	262	.word 0x00080200
263		263
264	pms_20080040:	264	pms_20080040:
265	.word 0x20080040	265	.word 0x20080040
266		266
267	pms_000001FF:	267	pms_000001FF:
268	.word 0x000001FF	268	.word 0x000001FF
269		269
270	pms_devnamestringdescriptor:	270	pms_devnamestringdescriptor:
271	.word 0x0052030C	271	.word 0x0052030C
272	.word 0x00500042	272	.word 0x00500042
273	.word 0x0053004D	273	.word 0x0053004D
274		274
275	pms_langstringdescriptor:	275	pms_langstringdescriptor:
276	.word 0x04090304	276	.word 0x04090304
277		277
278	pms_ctrlbuf:	278	pms_ctrlbuf:
279	.word 0	279	.word 0
280	.word 0	280	.word 0
281	.word 0	281	.word 0
282	.word 0	282	.word 0
283	.word 0	283	.word 0
284	.word 0	284	.word 0
285	.word 0	285	.word 0
286	.word 0	286	.word 0
287	.word 0	287	.word 0
288	.word 0	288	.word 0
289	.word 0	289	.word 0
290	.word 0	290	.word 0
291	.word 0	291	.word 0
292	.word 0	292	.word 0
293	.word 0	293	.word 0
294	.word 0	294	.word 0
295		295
296	pms_recvbuf:	296	pms_recvbuf:
297	.word 0	297	.word 0
298	.word 0	298	.word 0
299		299
300	pms_GET_STATUS:	300	pms_GET_STATUS:
301	LDRB R0, [R14]	301	LDRB R0, [R14]
302	CMP R0, #0x80	302	CMP R0, #0x80
303	STREQ R12, [R14]	303	STREQ R12, [R14]
304	STRNE R13, [R14]	304	STRNE R13, [R14]
305	MOV R1, #2	305	MOV R1, #2
306	B pms_ctrlsend	306	B pms_ctrlsend
307		307
308	.size post_mortem_stub, .-post_mortem_stub	308	.size post_mortem_stub, .-post_mortem_stub