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Diffstat (limited to 'firmware/target/arm/s5l8700/i2c-s5l8700.c')
-rw-r--r--firmware/target/arm/s5l8700/i2c-s5l8700.c46
1 files changed, 18 insertions, 28 deletions
diff --git a/firmware/target/arm/s5l8700/i2c-s5l8700.c b/firmware/target/arm/s5l8700/i2c-s5l8700.c
index 5b55334b25..8b0879bcf9 100644
--- a/firmware/target/arm/s5l8700/i2c-s5l8700.c
+++ b/firmware/target/arm/s5l8700/i2c-s5l8700.c
@@ -40,20 +40,10 @@
40*/ 40*/
41 41
42static struct mutex i2c_mtx; 42static struct mutex i2c_mtx;
43static struct wakeup i2c_wakeup;
44
45void INT_IIC(void)
46{
47 /* disable interrupt (but don't clear it yet) */
48 IICCON &= ~((1 << 4) | (1 << 5));
49
50 wakeup_signal(&i2c_wakeup);
51}
52 43
53void i2c_init(void) 44void i2c_init(void)
54{ 45{
55 mutex_init(&i2c_mtx); 46 mutex_init(&i2c_mtx);
56 wakeup_init(&i2c_wakeup);
57 47
58 /* enable I2C pins */ 48 /* enable I2C pins */
59 PCON10 = (2 << 2) | 49 PCON10 = (2 << 2) |
@@ -65,10 +55,10 @@ void i2c_init(void)
65 /* initial config */ 55 /* initial config */
66 IICADD = 0; 56 IICADD = 0;
67 IICCON = (1 << 7) | /* ACK_GEN */ 57 IICCON = (1 << 7) | /* ACK_GEN */
68 (1 << 6) | /* CLKSEL = PCLK/512 */ 58 (0 << 6) | /* CLKSEL = PCLK/16 */
69 (1 << 5) | /* INT_EN */ 59 (1 << 5) | /* INT_EN */
70 (1 << 4) | /* IRQ clear */ 60 (1 << 4) | /* IRQ clear */
71 (3 << 0); /* CK_REG */ 61 (7 << 0); /* CK_REG */
72 62
73 /* serial output on */ 63 /* serial output on */
74 IICSTAT = (1 << 4); 64 IICSTAT = (1 << 4);
@@ -84,26 +74,26 @@ int i2c_write(unsigned char slave, int address, int len, const unsigned char *da
84 /* START */ 74 /* START */
85 IICDS = slave & ~1; 75 IICDS = slave & ~1;
86 IICSTAT = 0xF0; 76 IICSTAT = 0xF0;
87 IICCON = 0xF3; 77 IICCON = 0xB7;
88 while ((IICCON & 0x10) == 0) wakeup_wait(&i2c_wakeup, 1); 78 while ((IICCON & 0x10) == 0);
89 79
90 if (address >= 0) { 80 if (address >= 0) {
91 /* write address */ 81 /* write address */
92 IICDS = address; 82 IICDS = address;
93 IICCON = 0xF3; 83 IICCON = 0xB7;
94 while ((IICCON & 0x10) == 0) wakeup_wait(&i2c_wakeup, 1); 84 while ((IICCON & 0x10) == 0);
95 } 85 }
96 86
97 /* write data */ 87 /* write data */
98 while (len--) { 88 while (len--) {
99 IICDS = *data++; 89 IICDS = *data++;
100 IICCON = 0xF3; 90 IICCON = 0xB7;
101 while ((IICCON & 0x10) == 0) wakeup_wait(&i2c_wakeup, 1); 91 while ((IICCON & 0x10) == 0);
102 } 92 }
103 93
104 /* STOP */ 94 /* STOP */
105 IICSTAT = 0xD0; 95 IICSTAT = 0xD0;
106 IICCON = 0xF3; 96 IICCON = 0xB7;
107 while ((IICSTAT & (1 << 5)) != 0); 97 while ((IICSTAT & (1 << 5)) != 0);
108 98
109 mutex_unlock(&i2c_mtx); 99 mutex_unlock(&i2c_mtx);
@@ -118,30 +108,30 @@ int i2c_read(unsigned char slave, int address, int len, unsigned char *data)
118 /* START */ 108 /* START */
119 IICDS = slave & ~1; 109 IICDS = slave & ~1;
120 IICSTAT = 0xF0; 110 IICSTAT = 0xF0;
121 IICCON = 0xF3; 111 IICCON = 0xB7;
122 while ((IICCON & 0x10) == 0) wakeup_wait(&i2c_wakeup, 1); 112 while ((IICCON & 0x10) == 0);
123 113
124 /* write address */ 114 /* write address */
125 IICDS = address; 115 IICDS = address;
126 IICCON = 0xF3; 116 IICCON = 0xB7;
127 while ((IICCON & 0x10) == 0) wakeup_wait(&i2c_wakeup, 1); 117 while ((IICCON & 0x10) == 0);
128 } 118 }
129 119
130 /* (repeated) START */ 120 /* (repeated) START */
131 IICDS = slave | 1; 121 IICDS = slave | 1;
132 IICSTAT = 0xB0; 122 IICSTAT = 0xB0;
133 IICCON = 0xF3; 123 IICCON = 0xB7;
134 while ((IICCON & 0x10) == 0) wakeup_wait(&i2c_wakeup, 1); 124 while ((IICCON & 0x10) == 0);
135 125
136 while (len--) { 126 while (len--) {
137 IICCON = (len == 0) ? 0x73 : 0xF3; /* NACK or ACK */ 127 IICCON = (len == 0) ? 0x37 : 0xB7; /* NACK or ACK */
138 while ((IICCON & 0x10) == 0) wakeup_wait(&i2c_wakeup, 1); 128 while ((IICCON & 0x10) == 0);
139 *data++ = IICDS; 129 *data++ = IICDS;
140 } 130 }
141 131
142 /* STOP */ 132 /* STOP */
143 IICSTAT = 0x90; 133 IICSTAT = 0x90;
144 IICCON = 0xF3; 134 IICCON = 0xB7;
145 while ((IICSTAT & (1 << 5)) != 0); 135 while ((IICSTAT & (1 << 5)) != 0);
146 136
147 mutex_unlock(&i2c_mtx); 137 mutex_unlock(&i2c_mtx);