diff options
Diffstat (limited to 'firmware/target/arm/s3c2440')
5 files changed, 24 insertions, 22 deletions
diff --git a/firmware/target/arm/s3c2440/crt0.S b/firmware/target/arm/s3c2440/crt0.S index a05fd78fe9..7de2c46437 100644 --- a/firmware/target/arm/s3c2440/crt0.S +++ b/firmware/target/arm/s3c2440/crt0.S | |||
@@ -467,6 +467,7 @@ stackmunge: | |||
467 | ldr sp, =stackend | 467 | ldr sp, =stackend |
468 | 468 | ||
469 | /* Start the main function */ | 469 | /* Start the main function */ |
470 | adr lr, vectors | ||
470 | ldr pc, =main | 471 | ldr pc, =main |
471 | 472 | ||
472 | /* Should never get here, but let's restart in case (also needed for | 473 | /* Should never get here, but let's restart in case (also needed for |
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h b/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h index b010e3a4d4..54d0964560 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h +++ b/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h | |||
@@ -21,6 +21,10 @@ | |||
21 | #ifndef ATA_TARGET_H | 21 | #ifndef ATA_TARGET_H |
22 | #define ATA_TARGET_H | 22 | #define ATA_TARGET_H |
23 | 23 | ||
24 | #ifdef BOOTLOADER | ||
25 | #define ATA_DRIVER_CLOSE | ||
26 | #endif | ||
27 | |||
24 | /* Plain C read & write loops */ | 28 | /* Plain C read & write loops */ |
25 | #define PREFER_C_READING | 29 | #define PREFER_C_READING |
26 | #define PREFER_C_WRITING | 30 | #define PREFER_C_WRITING |
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c index 6a750c32e2..6cabc8dc81 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include "timer.h" | 24 | #include "timer.h" |
25 | #include "thread.h" | 25 | #include "thread.h" |
26 | 26 | ||
27 | static inline void tick_set(unsigned int interval_in_ms) | 27 | void tick_start(unsigned int interval_in_ms) |
28 | { | 28 | { |
29 | /* | 29 | /* |
30 | * Based on default PCLK of 49.1568MHz - scaling chosen to give | 30 | * Based on default PCLK of 49.1568MHz - scaling chosen to give |
@@ -49,11 +49,6 @@ static inline void tick_set(unsigned int interval_in_ms) | |||
49 | TCON |= 1 << 21; | 49 | TCON |= 1 << 21; |
50 | /* reset manual bit */ | 50 | /* reset manual bit */ |
51 | TCON &= ~(1 << 21); | 51 | TCON &= ~(1 << 21); |
52 | } | ||
53 | |||
54 | void tick_start(unsigned int interval_in_ms) | ||
55 | { | ||
56 | tick_set(interval_in_ms); | ||
57 | 52 | ||
58 | /* interval mode */ | 53 | /* interval mode */ |
59 | TCON |= 1 << 22; | 54 | TCON |= 1 << 22; |
@@ -65,24 +60,14 @@ void tick_start(unsigned int interval_in_ms) | |||
65 | } | 60 | } |
66 | 61 | ||
67 | #ifdef BOOTLOADER | 62 | #ifdef BOOTLOADER |
68 | void delay(int ticks) | 63 | void tick_stop(void) |
69 | { | 64 | { |
70 | volatile unsigned long counter; | 65 | s3c_regset32(&INTMSK, TIMER4_MASK); |
71 | 66 | TCON &= ~(1 << 20); | |
72 | INTMSK |= TIMER4_MASK; | 67 | SRCPND = TIMER4_MASK; |
73 | 68 | INTPND = TIMER4_MASK; | |
74 | tick_set(1000 * ticks / HZ); | ||
75 | |||
76 | /* autoreload Off */ | ||
77 | TCON &= ~(1 << 22); | ||
78 | /* start timer 4 */ | ||
79 | TCON |= (1 << 20); | ||
80 | |||
81 | do { | ||
82 | counter = TCNTO4; | ||
83 | } while(counter > 0); | ||
84 | } | 69 | } |
85 | #endif /* BOOTLOADER */ | 70 | #endif |
86 | 71 | ||
87 | void TIMER4(void) | 72 | void TIMER4(void) |
88 | { | 73 | { |
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c index 6d8108be49..43e2c408a2 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c | |||
@@ -143,6 +143,15 @@ void s3c_regclr32(volatile unsigned long *reg, unsigned long bits) | |||
143 | s3c_regmod32(reg, 0, bits); | 143 | s3c_regmod32(reg, 0, bits); |
144 | } | 144 | } |
145 | 145 | ||
146 | #ifdef BOOTLOADER | ||
147 | void system_prepare_fw_start(void) | ||
148 | { | ||
149 | tick_stop(); | ||
150 | disable_interrupt(IRQ_FIQ_STATUS); | ||
151 | INTMSK = 0xFFFFFFFF; | ||
152 | } | ||
153 | #endif | ||
154 | |||
146 | void system_init(void) | 155 | void system_init(void) |
147 | { | 156 | { |
148 | INTMSK = 0xFFFFFFFF; | 157 | INTMSK = 0xFFFFFFFF; |
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h b/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h index 43758ece08..320c595b99 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h +++ b/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h | |||
@@ -28,6 +28,9 @@ | |||
28 | #define CPUFREQ_NORMAL 98784000 | 28 | #define CPUFREQ_NORMAL 98784000 |
29 | #define CPUFREQ_MAX 296352000 | 29 | #define CPUFREQ_MAX 296352000 |
30 | 30 | ||
31 | void system_prepare_fw_start(void); | ||
32 | void tick_stop(void); | ||
33 | |||
31 | /* Functions to set and clear regiser bits atomically */ | 34 | /* Functions to set and clear regiser bits atomically */ |
32 | 35 | ||
33 | /* Set and clear register bits */ | 36 | /* Set and clear register bits */ |