diff options
Diffstat (limited to 'firmware/target/arm/s3c2440')
-rw-r--r-- | firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c | 4 | ||||
-rw-r--r-- | firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c | 4 | ||||
-rw-r--r-- | firmware/target/arm/s3c2440/mini2440/pcm-mini2440.c | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c index 89b00bbd1d..aae4c4b1d8 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c | |||
@@ -121,7 +121,8 @@ void copy_read_sectors(unsigned char* buf, int wordcount) | |||
121 | /* Activate the channel */ | 121 | /* Activate the channel */ |
122 | DMASKTRIG0 = 0x2; | 122 | DMASKTRIG0 = 0x2; |
123 | 123 | ||
124 | invalidate_dcache_range((void *)buf, wordcount*2); | 124 | /* Dump cache for the buffer */ |
125 | discard_dcache_range((void *)buf, wordcount*2); | ||
125 | 126 | ||
126 | /* Start DMA */ | 127 | /* Start DMA */ |
127 | DMASKTRIG0 |= 0x1; | 128 | DMASKTRIG0 |= 0x1; |
@@ -129,6 +130,5 @@ void copy_read_sectors(unsigned char* buf, int wordcount) | |||
129 | /* Wait for transfer to complete */ | 130 | /* Wait for transfer to complete */ |
130 | while((DSTAT0 & 0x000fffff)) | 131 | while((DSTAT0 & 0x000fffff)) |
131 | yield(); | 132 | yield(); |
132 | /* Dump cache for the buffer */ | ||
133 | } | 133 | } |
134 | #endif | 134 | #endif |
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c index b133639e12..35905645dd 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c | |||
@@ -111,7 +111,7 @@ static void play_start_pcm(void) | |||
111 | SRCPND = DMA2_MASK; | 111 | SRCPND = DMA2_MASK; |
112 | 112 | ||
113 | /* Flush any pending writes */ | 113 | /* Flush any pending writes */ |
114 | clean_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2); | 114 | commit_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2); |
115 | 115 | ||
116 | /* unmask DMA interrupt when unlocking */ | 116 | /* unmask DMA interrupt when unlocking */ |
117 | dma_play_lock.state = DMA2_MASK; | 117 | dma_play_lock.state = DMA2_MASK; |
@@ -228,7 +228,7 @@ void fiq_handler(void) | |||
228 | return; | 228 | return; |
229 | 229 | ||
230 | /* Flush any pending cache writes */ | 230 | /* Flush any pending cache writes */ |
231 | clean_dcache_range(start, size); | 231 | commit_dcache_range(start, size); |
232 | 232 | ||
233 | /* set the new DMA values */ | 233 | /* set the new DMA values */ |
234 | DCON2 = DMA_CONTROL_SETUP | (size >> 1); | 234 | DCON2 = DMA_CONTROL_SETUP | (size >> 1); |
diff --git a/firmware/target/arm/s3c2440/mini2440/pcm-mini2440.c b/firmware/target/arm/s3c2440/mini2440/pcm-mini2440.c index 20332c12f8..a4f58a8e06 100644 --- a/firmware/target/arm/s3c2440/mini2440/pcm-mini2440.c +++ b/firmware/target/arm/s3c2440/mini2440/pcm-mini2440.c | |||
@@ -146,7 +146,7 @@ static void play_start_pcm(void) | |||
146 | SRCPND = DMA2_MASK; | 146 | SRCPND = DMA2_MASK; |
147 | 147 | ||
148 | /* Flush any pending writes */ | 148 | /* Flush any pending writes */ |
149 | clean_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2); | 149 | commit_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2); |
150 | 150 | ||
151 | /* unmask DMA interrupt when unlocking */ | 151 | /* unmask DMA interrupt when unlocking */ |
152 | dma_play_lock.state = DMA2_MASK; | 152 | dma_play_lock.state = DMA2_MASK; |
@@ -268,7 +268,7 @@ void fiq_handler(void) | |||
268 | return; | 268 | return; |
269 | 269 | ||
270 | /* Flush any pending cache writes */ | 270 | /* Flush any pending cache writes */ |
271 | clean_dcache_range(start, size); | 271 | commit_dcache_range(start, size); |
272 | 272 | ||
273 | /* set the new DMA values */ | 273 | /* set the new DMA values */ |
274 | DCON2 = DMA_CONTROL_SETUP | (size >> 1); | 274 | DCON2 = DMA_CONTROL_SETUP | (size >> 1); |