1 files changed, 70 insertions, 0 deletions
diff --git a/firmware/target/arm/s3c2440/system-target.h b/firmware/target/arm/s3c2440/system-target.h
new file mode 100644
index 0000000000..9808d31255
--- /dev/null
+++ b/firmware/target/arm/s3c2440/system-target.h
@@ -0,0 +1,70 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2007 by Greg White
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef SYSTEM_TARGET_H
+#define SYSTEM_TARGET_H
+#include "system-arm.h"
+#include "mmu-arm.h"
+/* TODO: Needs checking/porting */
+#ifdef GIGABEAT_F
+#define CPUFREQ_DEFAULT 98784000
+#define CPUFREQ_NORMAL  98784000
+#define CPUFREQ_MAX    296352000
+#ifdef BOOTLOADER
+/* All addresses within rockbox are in IRAM in the bootloader so
+   are therefore uncached */
+#define UNCACHED_ADDR(a) (a)
+#else /* !BOOTLOADER */
+#define UNCACHED_BASE_ADDR 0x30000000
+#define UNCACHED_ADDR(a)  ((typeof(a))((unsigned int)(a) | UNCACHED_BASE_ADDR ))
+#endif /* BOOTLOADER */
+#elif defined(MINI2440)
+#define CPUFREQ_DEFAULT 101250000
+#define CPUFREQ_NORMAL  101250000
+#define CPUFREQ_MAX     405000000
+#define UNCACHED_BASE_ADDR 0x30000000
+#define UNCACHED_ADDR(a)  ((typeof(a))((unsigned int)(a) | UNCACHED_BASE_ADDR ))
+#else
+#error Unknown target
+#endif
+void system_prepare_fw_start(void);
+void tick_stop(void);
+/* Functions to set and clear register bits atomically */
+/* Set and clear register bits */
+void s3c_regmod32(volatile unsigned long *reg, unsigned long bits,
+                  unsigned long mask);
+/* Set register bits */
+void s3c_regset32(volatile unsigned long *reg, unsigned long bits);
+/* Clear register bits */
+void s3c_regclr32(volatile unsigned long *reg, unsigned long bits);
+#endif /* SYSTEM_TARGET_H */

diff --git a/firmware/target/arm/s3c2440/system-target.h b/firmware/target/arm/s3c2440/system-target.h new file mode 100644 index 0000000000..9808d31255 --- /dev/null +++ b/firmware/target/arm/s3c2440/system-target.h
@@ -0,0 +1,70 @@
	1	/***************************************************************************
	2	* __________ __ ___.
	3	* Open \______ \ ____ ____ \| \| _\_ \|__ _______ ___
	4	* Source \| _// _ \_/ ___\\| \|/ /\| __ \ / _ \ \/ /
	5	* Jukebox \| \| ( <_> ) \___\| < \| \_\ ( <_> > < <
	6	* Firmware \|____\|_ /\____/ \___ >__\|_ \\|___ /\____/__/\_ \
	7	* \/ \/ \/ \/ \/
	8	* $Id$
	9	*
	10	* Copyright (C) 2007 by Greg White
	11	*
	12	* This program is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License
	14	* as published by the Free Software Foundation; either version 2
	15	* of the License, or (at your option) any later version.
	16	*
	17	* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
	18	* KIND, either express or implied.
	19	*
	20	****************************************************************************/
	21	#ifndef SYSTEM_TARGET_H
	22	#define SYSTEM_TARGET_H
	23
	24	#include "system-arm.h"
	25	#include "mmu-arm.h"
	26
	27	/* TODO: Needs checking/porting */
	28
	29	#ifdef GIGABEAT_F
	30	#define CPUFREQ_DEFAULT 98784000
	31	#define CPUFREQ_NORMAL 98784000
	32	#define CPUFREQ_MAX 296352000
	33
	34	#ifdef BOOTLOADER
	35	/* All addresses within rockbox are in IRAM in the bootloader so
	36	are therefore uncached */
	37	#define UNCACHED_ADDR(a) (a)
	38	#else /* !BOOTLOADER */
	39	#define UNCACHED_BASE_ADDR 0x30000000
	40	#define UNCACHED_ADDR(a) ((typeof(a))((unsigned int)(a) \| UNCACHED_BASE_ADDR ))
	41	#endif /* BOOTLOADER */
	42
	43	#elif defined(MINI2440)
	44
	45	#define CPUFREQ_DEFAULT 101250000
	46	#define CPUFREQ_NORMAL 101250000
	47	#define CPUFREQ_MAX 405000000
	48
	49	#define UNCACHED_BASE_ADDR 0x30000000
	50	#define UNCACHED_ADDR(a) ((typeof(a))((unsigned int)(a) \| UNCACHED_BASE_ADDR ))
	51
	52	#else
	53	#error Unknown target
	54	#endif
	55
	56
	57	void system_prepare_fw_start(void);
	58	void tick_stop(void);
	59
	60	/* Functions to set and clear register bits atomically */
	61
	62	/* Set and clear register bits */
	63	void s3c_regmod32(volatile unsigned long *reg, unsigned long bits,
	64	unsigned long mask);
	65	/* Set register bits */
	66	void s3c_regset32(volatile unsigned long *reg, unsigned long bits);
	67	/* Clear register bits */
	68	void s3c_regclr32(volatile unsigned long *reg, unsigned long bits);
	69
	70	#endif /* SYSTEM_TARGET_H */