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-rw-r--r--firmware/target/arm/s3c2440/sd-s3c2440.c171
1 files changed, 86 insertions, 85 deletions
diff --git a/firmware/target/arm/s3c2440/sd-s3c2440.c b/firmware/target/arm/s3c2440/sd-s3c2440.c
index 2ff68aa4ee..82fd60c711 100644
--- a/firmware/target/arm/s3c2440/sd-s3c2440.c
+++ b/firmware/target/arm/s3c2440/sd-s3c2440.c
@@ -18,7 +18,7 @@
18 * KIND, either express or implied. 18 * KIND, either express or implied.
19 * 19 *
20 ****************************************************************************/ 20 ****************************************************************************/
21 21
22//#define SD_DEBUG 22//#define SD_DEBUG
23 23
24#include "system.h" 24#include "system.h"
@@ -33,7 +33,7 @@
33#include "sdmmc.h" 33#include "sdmmc.h"
34#endif 34#endif
35#include "storage.h" 35#include "storage.h"
36#include "dma-target.h" 36#include "dma-target.h"
37#include "system-target.h" 37#include "system-target.h"
38#include "led-mini2440.h" 38#include "led-mini2440.h"
39 39
@@ -83,7 +83,7 @@ struct sd_card_status
83 int retry_max; 83 int retry_max;
84}; 84};
85 85
86/** static, private data **/ 86/** static, private data **/
87 87
88/* for compatibility */ 88/* for compatibility */
89static long last_disk_activity = -1; 89static long last_disk_activity = -1;
@@ -117,13 +117,13 @@ static struct mutex sd_mtx SHAREDBSS_ATTR;
117static struct semaphore transfer_completion_signal; 117static struct semaphore transfer_completion_signal;
118static volatile unsigned int transfer_error[NUM_DRIVES]; 118static volatile unsigned int transfer_error[NUM_DRIVES];
119/* align on cache line size */ 119/* align on cache line size */
120static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS * SD_BLOCK_SIZE] 120static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS * SD_BLOCK_SIZE]
121 __attribute__((aligned(32))); 121 __attribute__((aligned(32)));
122static unsigned char * uncached_buffer; 122static unsigned char * uncached_buffer;
123 123
124static inline void mci_delay(void) 124static inline void mci_delay(void)
125{ 125{
126 int i = 0xffff; 126 int i = 0xffff;
127 while (i--) 127 while (i--)
128 asm volatile ("nop\n"); 128 asm volatile ("nop\n");
129} 129}
@@ -146,7 +146,7 @@ static void get_regs (unsigned *regs)
146{ 146{
147 unsigned j; 147 unsigned j;
148 volatile unsigned long *sdi_reg = &SDICON; 148 volatile unsigned long *sdi_reg = &SDICON;
149 149
150 for (j=0; j < 16;j++) 150 for (j=0; j < 16;j++)
151 { 151 {
152 *regs++ = *sdi_reg++; 152 *regs++ = *sdi_reg++;
@@ -158,7 +158,7 @@ static void dump_regs (unsigned *regs1, unsigned *regs2)
158 unsigned j; 158 unsigned j;
159 volatile unsigned long*sdi_reg = &SDICON; 159 volatile unsigned long*sdi_reg = &SDICON;
160 unsigned long diff; 160 unsigned long diff;
161 161
162 for (j=0; j < 16;j++) 162 for (j=0; j < 16;j++)
163 { 163 {
164 diff = *regs1 ^ *regs2; 164 diff = *regs1 ^ *regs2;
@@ -174,23 +174,23 @@ static void dump_regs (unsigned *regs1, unsigned *regs2)
174static void debug_r1(int cmd) 174static void debug_r1(int cmd)
175{ 175{
176#if defined(SD_DEBUG) 176#if defined(SD_DEBUG)
177 dbgprintf("CMD%2.2d:SDICSTA=%04x [%c%c%c%c%c-%c%c%c%c%c%c%c] SDIRSP0=%08x [%d %s] \n", 177 dbgprintf("CMD%2.2d:SDICSTA=%04x [%c%c%c%c%c-%c%c%c%c%c%c%c] SDIRSP0=%08x [%d %s] \n",
178 cmd, 178 cmd,
179 SDICSTA, 179 SDICSTA,
180 (SDICSTA & S3C2410_SDICMDSTAT_CRCFAIL) ? 'C' : ' ', 180 (SDICSTA & S3C2410_SDICMDSTAT_CRCFAIL) ? 'C' : ' ',
181 (SDICSTA & S3C2410_SDICMDSTAT_CMDSENT) ? 'S' : ' ', 181 (SDICSTA & S3C2410_SDICMDSTAT_CMDSENT) ? 'S' : ' ',
182 (SDICSTA & S3C2410_SDICMDSTAT_CMDTIMEOUT) ? 'T' : ' ', 182 (SDICSTA & S3C2410_SDICMDSTAT_CMDTIMEOUT) ? 'T' : ' ',
183 (SDICSTA & S3C2410_SDICMDSTAT_RSPFIN) ? 'R' : ' ', 183 (SDICSTA & S3C2410_SDICMDSTAT_RSPFIN) ? 'R' : ' ',
184 (SDICSTA & S3C2410_SDICMDSTAT_XFERING) ? 'X' : ' ', 184 (SDICSTA & S3C2410_SDICMDSTAT_XFERING) ? 'X' : ' ',
185 185
186 (SDICSTA & 0x40) ? 'P' : ' ', 186 (SDICSTA & 0x40) ? 'P' : ' ',
187 (SDICSTA & 0x20) ? 'A' : ' ', 187 (SDICSTA & 0x20) ? 'A' : ' ',
188 (SDICSTA & 0x10) ? 'E' : ' ', 188 (SDICSTA & 0x10) ? 'E' : ' ',
189 (SDICSTA & 0x08) ? 'C' : ' ', 189 (SDICSTA & 0x08) ? 'C' : ' ',
190 (SDICSTA & 0x04) ? 'I' : ' ', 190 (SDICSTA & 0x04) ? 'I' : ' ',
191 (SDICSTA & 0x02) ? 'R' : ' ', 191 (SDICSTA & 0x02) ? 'R' : ' ',
192 (SDICSTA & 0x01) ? 'Z' : ' ', 192 (SDICSTA & 0x01) ? 'Z' : ' ',
193 193
194 SDIRSP0, 194 SDIRSP0,
195 SD_R1_CURRENT_STATE(SDIRSP0), 195 SD_R1_CURRENT_STATE(SDIRSP0),
196 (SDIRSP0 & SD_R1_READY_FOR_DATA) ? "RDY " : " " 196 (SDIRSP0 & SD_R1_READY_FOR_DATA) ? "RDY " : " "
@@ -205,8 +205,8 @@ void SDI (void)
205 int status = SDIDSTA; 205 int status = SDIDSTA;
206#ifndef HAVE_MULTIDRIVE 206#ifndef HAVE_MULTIDRIVE
207 const int curr_card = 0; 207 const int curr_card = 0;
208#endif 208#endif
209 209
210 transfer_error[curr_card] = status 210 transfer_error[curr_card] = status
211#if 0 211#if 0
212 & ( S3C2410_SDIDSTA_CRCFAIL | S3C2410_SDIDSTA_RXCRCFAIL | 212 & ( S3C2410_SDIDSTA_CRCFAIL | S3C2410_SDIDSTA_RXCRCFAIL |
@@ -217,7 +217,7 @@ void SDI (void)
217 SDIDSTA |= S3C2410_SDIDSTA_CLEAR_BITS; /* needed to clear int */ 217 SDIDSTA |= S3C2410_SDIDSTA_CLEAR_BITS; /* needed to clear int */
218 218
219 dbgprintf ("SDI %x\n", transfer_error[curr_card]); 219 dbgprintf ("SDI %x\n", transfer_error[curr_card]);
220 220
221 semaphore_release(&transfer_completion_signal); 221 semaphore_release(&transfer_completion_signal);
222 222
223 /* Ack the interrupt */ 223 /* Ack the interrupt */
@@ -229,13 +229,13 @@ void SDI (void)
229void dma_callback (void) 229void dma_callback (void)
230{ 230{
231 const int status = SDIDSTA; 231 const int status = SDIDSTA;
232 232
233 transfer_error[0] = status & (S3C2410_SDIDSTA_CRCFAIL | 233 transfer_error[0] = status & (S3C2410_SDIDSTA_CRCFAIL |
234 S3C2410_SDIDSTA_RXCRCFAIL | 234 S3C2410_SDIDSTA_RXCRCFAIL |
235 S3C2410_SDIDSTA_DATATIMEOUT ); 235 S3C2410_SDIDSTA_DATATIMEOUT );
236 236
237 SDIDSTA |= S3C2410_SDIDSTA_CLEAR_BITS; /* needed to clear int */ 237 SDIDSTA |= S3C2410_SDIDSTA_CLEAR_BITS; /* needed to clear int */
238 238
239 dbgprintf ("dma_cb\n"); 239 dbgprintf ("dma_cb\n");
240 semaphore_release(&transfer_completion_signal); 240 semaphore_release(&transfer_completion_signal);
241} 241}
@@ -248,14 +248,14 @@ static void init_sdi_controller(const int card_no)
248/*****************************************************************************/ 248/*****************************************************************************/
249#ifdef MINI2440 249#ifdef MINI2440
250 /* Specific to Mini2440 */ 250 /* Specific to Mini2440 */
251 251
252 /* Enable pullups on SDCMD and SDDAT pins */ 252 /* Enable pullups on SDCMD and SDDAT pins */
253 S3C2440_GPIO_PULLUP (GPEUP, 6, GPIO_PULLUP_ENABLE); 253 S3C2440_GPIO_PULLUP (GPEUP, 6, GPIO_PULLUP_ENABLE);
254 S3C2440_GPIO_PULLUP (GPEUP, 7, GPIO_PULLUP_ENABLE); 254 S3C2440_GPIO_PULLUP (GPEUP, 7, GPIO_PULLUP_ENABLE);
255 S3C2440_GPIO_PULLUP (GPEUP, 8, GPIO_PULLUP_ENABLE); 255 S3C2440_GPIO_PULLUP (GPEUP, 8, GPIO_PULLUP_ENABLE);
256 S3C2440_GPIO_PULLUP (GPEUP, 9, GPIO_PULLUP_ENABLE); 256 S3C2440_GPIO_PULLUP (GPEUP, 9, GPIO_PULLUP_ENABLE);
257 S3C2440_GPIO_PULLUP (GPEUP, 10, GPIO_PULLUP_ENABLE); 257 S3C2440_GPIO_PULLUP (GPEUP, 10, GPIO_PULLUP_ENABLE);
258 258
259 /* Enable special function for SDCMD, SDCLK and SDDAT pins */ 259 /* Enable special function for SDCMD, SDCLK and SDDAT pins */
260 S3C2440_GPIO_CONFIG (GPECON, 5, GPIO_FUNCTION); 260 S3C2440_GPIO_CONFIG (GPECON, 5, GPIO_FUNCTION);
261 S3C2440_GPIO_CONFIG (GPECON, 6, GPIO_FUNCTION); 261 S3C2440_GPIO_CONFIG (GPECON, 6, GPIO_FUNCTION);
@@ -263,15 +263,15 @@ static void init_sdi_controller(const int card_no)
263 S3C2440_GPIO_CONFIG (GPECON, 8, GPIO_FUNCTION); 263 S3C2440_GPIO_CONFIG (GPECON, 8, GPIO_FUNCTION);
264 S3C2440_GPIO_CONFIG (GPECON, 9, GPIO_FUNCTION); 264 S3C2440_GPIO_CONFIG (GPECON, 9, GPIO_FUNCTION);
265 S3C2440_GPIO_CONFIG (GPECON, 10, GPIO_FUNCTION); 265 S3C2440_GPIO_CONFIG (GPECON, 10, GPIO_FUNCTION);
266 266
267 /* Card Detect input */ 267 /* Card Detect input */
268 S3C2440_GPIO_CONFIG (GPGCON, 8, GPIO_INPUT); 268 S3C2440_GPIO_CONFIG (GPGCON, 8, GPIO_INPUT);
269 /* enable external irq 8-23 on the internal interrupt controller */ 269 /* enable external irq 8-23 on the internal interrupt controller */
270 INTMSK &= ~1<<5; 270 INTMSK &= ~1<<5;
271 /* enable GPG8 IRQ on the external interrupt controller */ 271 /* enable GPG8 IRQ on the external interrupt controller */
272 EINTMASK &= ~(1<<16); 272 EINTMASK &= ~(1<<16);
273 273
274 274
275 /* Write Protect input */ 275 /* Write Protect input */
276 S3C2440_GPIO_CONFIG (GPHCON, 8, GPIO_INPUT); 276 S3C2440_GPIO_CONFIG (GPHCON, 8, GPIO_INPUT);
277/*****************************************************************************/ 277/*****************************************************************************/
@@ -279,11 +279,11 @@ static void init_sdi_controller(const int card_no)
279#error Unsupported target 279#error Unsupported target
280#endif 280#endif
281/*****************************************************************************/ 281/*****************************************************************************/
282 282
283 /* About 400KHz for initial comms with card */ 283 /* About 400KHz for initial comms with card */
284 SDIPRE = PCLK / INITIAL_CLK - 1; 284 SDIPRE = PCLK / INITIAL_CLK - 1;
285 /* Byte order=Type A (Little Endian), clock enable */ 285 /* Byte order=Type A (Little Endian), clock enable */
286 SDICON = S3C2410_SDICON_CLOCKTYPE; 286 SDICON = S3C2410_SDICON_CLOCKTYPE;
287 SDIFSTA |= S3C2440_SDIFSTA_FIFORESET; 287 SDIFSTA |= S3C2440_SDIFSTA_FIFORESET;
288 SDIBSIZE = SD_BLOCK_SIZE; 288 SDIBSIZE = SD_BLOCK_SIZE;
289 SDIDTIMER= 0x7fffff; /* Set timeout count - max value */ 289 SDIDTIMER= 0x7fffff; /* Set timeout count - max value */
@@ -297,11 +297,11 @@ static void init_sdi_controller(const int card_no)
297 /* Enable interrupt in controller */ 297 /* Enable interrupt in controller */
298 bitclr32(&INTMOD, SDI_MASK); 298 bitclr32(&INTMOD, SDI_MASK);
299 bitclr32(&INTMSK, SDI_MASK); 299 bitclr32(&INTMSK, SDI_MASK);
300 300
301 SDIIMSK |= S3C2410_SDIIMSK_DATAFINISH 301 SDIIMSK |= S3C2410_SDIIMSK_DATAFINISH
302 | S3C2410_SDIIMSK_DATATIMEOUT 302 | S3C2410_SDIIMSK_DATATIMEOUT
303 | S3C2410_SDIIMSK_DATACRC 303 | S3C2410_SDIIMSK_DATACRC
304 | S3C2410_SDIIMSK_CRCSTATUS 304 | S3C2410_SDIIMSK_CRCSTATUS
305 | S3C2410_SDIIMSK_FIFOFAIL 305 | S3C2410_SDIIMSK_FIFOFAIL
306 ; 306 ;
307#endif 307#endif
@@ -325,18 +325,18 @@ static bool send_cmd(const int card_no, const int cmd, const int arg,
325 get_regs (reg_copy2); 325 get_regs (reg_copy2);
326 dump_regs (reg_copy, reg_copy2); 326 dump_regs (reg_copy, reg_copy2);
327#endif 327#endif
328 328
329#if 0 329#if 0
330 while (SDICSTA & S3C2410_SDICMDSTAT_XFERING) 330 while (SDICSTA & S3C2410_SDICMDSTAT_XFERING)
331 ; /* wait ?? */ 331 ; /* wait ?? */
332#endif 332#endif
333 /* set up new command */ 333 /* set up new command */
334 334
335 if (flags & MCI_ARG) 335 if (flags & MCI_ARG)
336 SDICARG = arg; 336 SDICARG = arg;
337 else 337 else
338 SDICARG = 0; 338 SDICARG = 0;
339 339
340 val = cmd | S3C2410_SDICMDCON_CMDSTART | S3C2410_SDICMDCON_SENDERHOST; 340 val = cmd | S3C2410_SDICMDCON_CMDSTART | S3C2410_SDICMDCON_SENDERHOST;
341 if(flags & MCI_RESP) 341 if(flags & MCI_RESP)
342 { 342 {
@@ -344,27 +344,27 @@ static bool send_cmd(const int card_no, const int cmd, const int arg,
344 if(flags & MCI_LONG_RESP) 344 if(flags & MCI_LONG_RESP)
345 val |= S3C2410_SDICMDCON_LONGRSP; 345 val |= S3C2410_SDICMDCON_LONGRSP;
346 } 346 }
347 347
348 /* Clear command/data status flags */ 348 /* Clear command/data status flags */
349 SDICSTA |= 0x0f << 9; 349 SDICSTA |= 0x0f << 9;
350 SDIDSTA |= S3C2410_SDIDSTA_CLEAR_BITS; 350 SDIDSTA |= S3C2410_SDIDSTA_CLEAR_BITS;
351 351
352 /* Initiate the command */ 352 /* Initiate the command */
353 SDICCON = val; 353 SDICCON = val;
354 354
355 if (flags & MCI_RESP) 355 if (flags & MCI_RESP)
356 { 356 {
357 /* wait for response or timeout */ 357 /* wait for response or timeout */
358 do 358 do
359 { 359 {
360 status = SDICSTA; 360 status = SDICSTA;
361 } while ( (status & (S3C2410_SDICMDSTAT_RSPFIN | 361 } while ( (status & (S3C2410_SDICMDSTAT_RSPFIN |
362 S3C2410_SDICMDSTAT_CMDTIMEOUT) ) == 0); 362 S3C2410_SDICMDSTAT_CMDTIMEOUT) ) == 0);
363 debug_r1(cmd); 363 debug_r1(cmd);
364 if (status & S3C2410_SDICMDSTAT_CMDTIMEOUT) 364 if (status & S3C2410_SDICMDSTAT_CMDTIMEOUT)
365 ret = false; 365 ret = false;
366 else if (status & (S3C2410_SDICMDSTAT_RSPFIN)) 366 else if (status & (S3C2410_SDICMDSTAT_RSPFIN))
367 { 367 {
368 /* resp received */ 368 /* resp received */
369 if(flags & MCI_LONG_RESP) 369 if(flags & MCI_LONG_RESP)
370 { 370 {
@@ -381,10 +381,10 @@ static bool send_cmd(const int card_no, const int cmd, const int arg,
381 else 381 else
382 ret = true; 382 ret = true;
383 } 383 }
384 else 384 else
385 { 385 {
386 /* wait for command completion or timeout */ 386 /* wait for command completion or timeout */
387 do 387 do
388 { 388 {
389 status = SDICSTA; 389 status = SDICSTA;
390 } while ( (status & (S3C2410_SDICMDSTAT_CMDSENT | 390 } while ( (status & (S3C2410_SDICMDSTAT_CMDSENT |
@@ -395,12 +395,12 @@ static bool send_cmd(const int card_no, const int cmd, const int arg,
395 else 395 else
396 ret = true; 396 ret = true;
397 } 397 }
398 398
399 /* Clear Command status flags */ 399 /* Clear Command status flags */
400 SDICSTA |= 0x0f << 9; 400 SDICSTA |= 0x0f << 9;
401 401
402 mci_delay(); 402 mci_delay();
403 403
404 return ret; 404 return ret;
405} 405}
406 406
@@ -558,7 +558,7 @@ bool sd_removable(IF_MD_NONVOID(int card_no))
558 const int card_no = 0; 558 const int card_no = 0;
559#endif 559#endif
560 (void)card_no; 560 (void)card_no;
561 561
562 /* not applicable */ 562 /* not applicable */
563 dbgprintf ("sd_remov"); 563 dbgprintf ("sd_remov");
564 return false; 564 return false;
@@ -596,7 +596,7 @@ static int sd_wait_for_state(const int card_no, unsigned int state)
596 } 596 }
597} 597}
598 598
599static int sd_transfer_sectors(int card_no, unsigned long start, 599static int sd_transfer_sectors(int card_no, sector_t start,
600 int count, void* buf, const bool write) 600 int count, void* buf, const bool write)
601{ 601{
602 int ret = EC_OK; 602 int ret = EC_OK;
@@ -636,7 +636,7 @@ static int sd_transfer_sectors(int card_no, unsigned long start,
636 void *dma_buf; 636 void *dma_buf;
637 const int cmd = 637 const int cmd =
638 write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK; 638 write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
639 unsigned long start_addr = start; 639 sector_t start_addr = start;
640 640
641 dma_buf = aligned_buffer; 641 dma_buf = aligned_buffer;
642 if(transfer > UNALIGNED_NUM_SECTORS) 642 if(transfer > UNALIGNED_NUM_SECTORS)
@@ -650,10 +650,10 @@ static int sd_transfer_sectors(int card_no, unsigned long start,
650 650
651 /* TODO? */ 651 /* TODO? */
652 SDIFSTA = SDIFSTA | S3C2440_SDIFSTA_FIFORESET; 652 SDIFSTA = SDIFSTA | S3C2440_SDIFSTA_FIFORESET;
653 SDIDCON = S3C2440_SDIDCON_DS_WORD | 653 SDIDCON = S3C2440_SDIDCON_DS_WORD |
654 S3C2410_SDIDCON_BLOCKMODE | S3C2410_SDIDCON_WIDEBUS | 654 S3C2410_SDIDCON_BLOCKMODE | S3C2410_SDIDCON_WIDEBUS |
655 S3C2410_SDIDCON_DMAEN | 655 S3C2410_SDIDCON_DMAEN |
656 S3C2440_SDIDCON_DATSTART | 656 S3C2440_SDIDCON_DATSTART |
657 ( transfer << 0); 657 ( transfer << 0);
658 if (write) 658 if (write)
659 SDIDCON |= S3C2410_SDIDCON_TXAFTERRESP | S3C2410_SDIDCON_XFER_TXSTART; 659 SDIDCON |= S3C2410_SDIDCON_TXAFTERRESP | S3C2410_SDIDCON_XFER_TXSTART;
@@ -665,6 +665,7 @@ static int sd_transfer_sectors(int card_no, unsigned long start,
665 INTPND = SDI_MASK; 665 INTPND = SDI_MASK;
666 666
667 /* Initiate read/write command */ 667 /* Initiate read/write command */
668 // XXX 64-bit
668 if(!send_cmd(card_no, cmd, start_addr, MCI_ARG | MCI_RESP, NULL)) 669 if(!send_cmd(card_no, cmd, start_addr, MCI_ARG | MCI_RESP, NULL))
669 { 670 {
670 ret -= 3*20; 671 ret -= 3*20;
@@ -674,32 +675,32 @@ static int sd_transfer_sectors(int card_no, unsigned long start,
674 if(write) 675 if(write)
675 { 676 {
676 request.source_addr = dma_buf; 677 request.source_addr = dma_buf;
677 request.source_control = DISRCC_LOC_AHB | DISRCC_INC_AUTO; 678 request.source_control = DISRCC_LOC_AHB | DISRCC_INC_AUTO;
678 request.dest_addr = &SDIDAT_LLE; 679 request.dest_addr = &SDIDAT_LLE;
679 request.dest_control = DISRCC_LOC_APB | DISRCC_INC_FIXED; 680 request.dest_control = DISRCC_LOC_APB | DISRCC_INC_FIXED;
680 request.count = transfer * SD_BLOCK_SIZE / sizeof(long); 681 request.count = transfer * SD_BLOCK_SIZE / sizeof(long);
681 request.source_map = DMA_SRC_MAP_SDI; 682 request.source_map = DMA_SRC_MAP_SDI;
682 request.control = DCON_DMD_HS | DCON_SYNC_APB | 683 request.control = DCON_DMD_HS | DCON_SYNC_APB |
683 DCON_HW_SEL | 684 DCON_HW_SEL |
684 DCON_NO_RELOAD | DCON_DSZ_WORD; 685 DCON_NO_RELOAD | DCON_DSZ_WORD;
685 request.callback = NULL; 686 request.callback = NULL;
686 687
687 dma_enable_channel(0, &request); 688 dma_enable_channel(0, &request);
688 } 689 }
689 else 690 else
690 { 691 {
691 request.source_addr = &SDIDAT_LLE; 692 request.source_addr = &SDIDAT_LLE;
692 request.source_control = DISRCC_LOC_APB | DISRCC_INC_FIXED; 693 request.source_control = DISRCC_LOC_APB | DISRCC_INC_FIXED;
693 request.dest_addr = dma_buf; 694 request.dest_addr = dma_buf;
694 request.dest_control = DISRCC_LOC_AHB | DISRCC_INC_AUTO; 695 request.dest_control = DISRCC_LOC_AHB | DISRCC_INC_AUTO;
695 request.count = transfer * SD_BLOCK_SIZE / sizeof(long); 696 request.count = transfer * SD_BLOCK_SIZE / sizeof(long);
696 request.source_map = DMA_SRC_MAP_SDI; 697 request.source_map = DMA_SRC_MAP_SDI;
697 request.control = DCON_DMD_HS | DCON_SYNC_APB | 698 request.control = DCON_DMD_HS | DCON_SYNC_APB |
698 DCON_HW_SEL | 699 DCON_HW_SEL |
699 DCON_NO_RELOAD | DCON_DSZ_WORD; 700 DCON_NO_RELOAD | DCON_DSZ_WORD;
700 request.callback = NULL; 701 request.callback = NULL;
701 702
702 dma_enable_channel(0, &request); 703 dma_enable_channel(0, &request);
703 } 704 }
704 705
705#if 0 706#if 0
@@ -716,12 +717,12 @@ static int sd_transfer_sectors(int card_no, unsigned long start,
716#endif 717#endif
717 718
718 semaphore_wait(&transfer_completion_signal, 100 /*TIMEOUT_BLOCK*/); 719 semaphore_wait(&transfer_completion_signal, 100 /*TIMEOUT_BLOCK*/);
719 720
720 /* wait for DMA to finish */ 721 /* wait for DMA to finish */
721 while (DSTAT0 & DSTAT_STAT_BUSY) 722 while (DSTAT0 & DSTAT_STAT_BUSY)
722 ; 723 ;
723 724
724#if 0 725#if 0
725 status = SDIDSTA; 726 status = SDIDSTA;
726 while ((status & (S3C2410_SDIDSTA_DATATIMEOUT|S3C2410_SDIDSTA_XFERFINISH)) == 0) 727 while ((status & (S3C2410_SDIDSTA_DATATIMEOUT|S3C2410_SDIDSTA_XFERFINISH)) == 0)
727 { 728 {
@@ -738,10 +739,10 @@ static int sd_transfer_sectors(int card_no, unsigned long start,
738 count -= transfer; 739 count -= transfer;
739 loops = 0; /* reset errors counter */ 740 loops = 0; /* reset errors counter */
740 } 741 }
741 else 742 else
742 { 743 {
743 dbgprintf ("SD transfer error : 0x%x\n", transfer_error[card_no]); 744 dbgprintf ("SD transfer error : 0x%x\n", transfer_error[card_no]);
744 745
745 if(loops++ > MAX_TRANSFER_ERRORS) 746 if(loops++ > MAX_TRANSFER_ERRORS)
746 { 747 {
747 led_flash(LED1|LED2, LED3|LED4); 748 led_flash(LED1|LED2, LED3|LED4);
@@ -783,11 +784,11 @@ sd_transfer_error:
783 return ret; 784 return ret;
784} 785}
785 786
786int sd_read_sectors(IF_MD(int card_no,) unsigned long start, int incount, 787int sd_read_sectors(IF_MD(int card_no,) sector_t start, int incount,
787 void* inbuf) 788 void* inbuf)
788{ 789{
789 int ret; 790 int ret;
790 791
791#ifdef HAVE_MULTIDRIVE 792#ifdef HAVE_MULTIDRIVE
792 dbgprintf ("sd_read %d %x %d\n", card_no, start, incount); 793 dbgprintf ("sd_read %d %x %d\n", card_no, start, incount);
793#else 794#else
@@ -804,7 +805,7 @@ int sd_read_sectors(IF_MD(int card_no,) unsigned long start, int incount,
804} 805}
805 806
806/*****************************************************************************/ 807/*****************************************************************************/
807int sd_write_sectors(IF_MD(int drive,) unsigned long start, int count, 808int sd_write_sectors(IF_MD(int drive,) sector_t start, int count,
808 const void* outbuf) 809 const void* outbuf)
809{ 810{
810#ifdef BOOTLOADER /* we don't need write support in bootloader */ 811#ifdef BOOTLOADER /* we don't need write support in bootloader */
@@ -835,7 +836,7 @@ void sd_enable(bool on)
835{ 836{
836 dbgprintf ("sd_enable %d\n", on); 837 dbgprintf ("sd_enable %d\n", on);
837 /* TODO: enable/disable SDI clock */ 838 /* TODO: enable/disable SDI clock */
838 839
839 if (sd_enabled == on) 840 if (sd_enabled == on)
840 return; /* nothing to do */ 841 return; /* nothing to do */
841 if (on) 842 if (on)
@@ -847,14 +848,14 @@ void sd_enable(bool on)
847 sd_enabled = false; 848 sd_enabled = false;
848 } 849 }
849} 850}
850 851
851int sd_init(void) 852int sd_init(void)
852{ 853{
853 int ret = EC_OK; 854 int ret = EC_OK;
854 dbgprintf ("\n==============================\n"); 855 dbgprintf ("\n==============================\n");
855 dbgprintf (" sd_init\n"); 856 dbgprintf (" sd_init\n");
856 dbgprintf ("==============================\n"); 857 dbgprintf ("==============================\n");
857 858
858 init_sdi_controller (0); 859 init_sdi_controller (0);
859#ifndef BOOTLOADER 860#ifndef BOOTLOADER
860 sd_enabled = true; 861 sd_enabled = true;
@@ -893,7 +894,7 @@ long sd_last_disk_activity(void)
893} 894}
894 895
895tCardInfo *card_get_info_target(int card_no) 896tCardInfo *card_get_info_target(int card_no)
896{ 897{
897 return &card_info[card_no]; 898 return &card_info[card_no];
898} 899}
899 900