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-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c2
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/power-meg-fx.c121
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c13
3 files changed, 131 insertions, 5 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c
index ac8dc380e2..e09f628809 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/lcd-meg-fx.c
@@ -244,7 +244,7 @@ static void LCD_SPI_init(void)
244/* LCD init */ 244/* LCD init */
245void lcd_init_device(void) 245void lcd_init_device(void)
246{ 246{
247#ifdef BOOTLOADER 247#if 0//def BOOTLOADER
248 int i; 248 int i;
249 /* When the Rockbox bootloader starts, we are changing framebuffer address, 249 /* When the Rockbox bootloader starts, we are changing framebuffer address,
250 but we don't want what's shown on the LCD to change until we do an 250 but we don't want what's shown on the LCD to change until we do an
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/power-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/power-meg-fx.c
index 544869ab6c..d625c07cc8 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/power-meg-fx.c
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/power-meg-fx.c
@@ -70,6 +70,11 @@ void power_off(void)
70 _backlight_off(); 70 _backlight_off();
71 _buttonlight_off(); 71 _buttonlight_off();
72 sleep(HZ); 72 sleep(HZ);
73
74 /* Do this to allow the drive to properly reset when player restarts
75 * immediately without running OF shutdown.
76 */
77 GPGCON&=~0x00300000;
73 78
74 /* Rockbox never properly shutdown the player. When the sleep bit is set 79 /* Rockbox never properly shutdown the player. When the sleep bit is set
75 * the player actually wakes up in some type of "zombie" state 80 * the player actually wakes up in some type of "zombie" state
@@ -81,6 +86,122 @@ void power_off(void)
81 CLKCON |=(1<<3); 86 CLKCON |=(1<<3);
82 87
83 reboot_point(); 88 reboot_point();
89
90#if 0
91
92 GPBCON=0x00015450;
93 GPBDAT=0x403;
94 GPBUP=0x3FD;
95
96 GPCCON =0xAAA054A8;
97 GPCDAT =0x0000038C;
98 GPCUP =0xFFFF;
99
100
101 GPDCON =0xAAA0AAA5;
102 GPDDAT =0x00000300;
103 GPDUP =0xFCFF;
104
105
106 GPECON =0xAA8002AA;
107 GPEDAT =0x0000FFED;
108 GPEUP =0x3817;
109
110 GPFCON =0x00000a00;
111 GPFDAT =0x000000F1;
112 GPFUP =0x000000FF;
113
114 GPGCON =0x01401002;
115 GPGDAT =0x00000180;
116 GPGUP =0x0000FF7F;
117
118 GPHCON =0x001540A5;
119 GPHDAT =0x000006FD;
120 GPHUP =0x00000187;
121
122// mine
123 INTMSK =0xFFFFFFFF;
124 EINTMASK=0x0FFFFEF0;
125 EXTINT0 =0xFFFFFECF;
126 EXTINT1 =0x07;
127//
128
129// INTMSK=0xFFFFFFFF;
130// EINTMASK=0x00200000;
131
132// GPHDAT=0x00000004;
133
134// EXTINT0=~0x00000130;
135// INTMSK=(~0x00000130)+0x00000100;
136// GPGUP=0xFFFFFFFF;
137
138//mine
139 INTMSK =0xFFFFFFDE;
140//
141
142 SRCPND=0xFFFFFFFF;
143 INTPND=0xFFFFFFFF;
144 GSTATUS1=0x00000600;
145
146 ADCCON=0x00000004;
147
148// MISCCR=MISCCR&(~0x703000)|0x603000;
149 LCDCON1=0x00000000;
150 LOCKTIME=0xFFFFFFFF;
151// REFRESH=REFRESH|0x00400000;
152
153// MISCCR=MISCCR|0x000E0000;
154
155// CLKCON=CLKCON|0x00004018;
156
157 /*
158 * This next piece of code was taken from the linux 2.6.17 sources:
159 * linux/arch/arm/mach-s3c2410/sleep.S
160 *
161 * Copyright (c) 2004 Simtec Electronics
162 * Ben Dooks <ben@simtec.co.uk>
163 *
164 * Based on PXA/SA1100 sleep code by:
165 * Nicolas Pitre, (c) 2002 Monta Vista Software Inc
166 * Cliff Brake, (c) 2001
167 */
168
169 asm volatile
170 (
171 /* get REFRESH, MISCCR, and CLKCON (and ensure in TLB) */
172 "ldr r4, =0x48000024 \n"
173 "ldr r5, =0x56000080 \n"
174 "ldr r6, =0x4C00000C \n"
175 "ldr r7, [ r4 ] \n"
176 "ldr r8, [ r5 ] \n"
177 "ldr r9, [ r6 ] \n"
178
179 /* Setup register writes */
180 "ldr r2, =0x006E3000 \n"
181 "ldr r3, =0x00004018 \n"
182 "orr r7, r7, #0x00400000 \n" /* SDRAM sleep command */
183 "orr r8, r8, r2 \n" /* SDRAM power-down signals */
184 "orr r9, r9, r3 \n" /* power down command */
185
186 /* first as a trial-run to load cache */
187 "teq pc, #0 \n"
188 "bl s3c2410_do_sleep \n"
189
190 /* now do it for real */
191 "teq r0, r0 \n"
192 "b s3c2410_do_sleep \n"
193
194 /* align next bit of code to cache line */
195 ".align 8 \n"
196 "s3c2410_do_sleep: \n"
197 "streq r7, [ r4 ] \n" /* SDRAM sleep command */
198 "streq r8, [ r5 ] \n" /* SDRAM power-down config */
199 "streq r3, [ r6 ] \n" /* CPU sleep */
200 "1: \n"
201 "beq 1b \n"
202 "bx lr \n"
203 );
204#endif
84} 205}
85 206
86#else /* SIMULATOR */ 207#else /* SIMULATOR */
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c
index 8065926e28..96afa9b238 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c
@@ -113,9 +113,14 @@ void system_reboot(void)
113 113
114static void set_page_tables(void) 114static void set_page_tables(void)
115{ 115{
116 map_section(0, 0, 0x1000, CACHE_NONE); /* map every memory region to itself */ 116 /* map every memory region to itself */
117 map_section(0x30000000, 0, 32, CACHE_ALL); /* map RAM to 0 and enable caching for it */ 117 map_section(0, 0, 0x1000, CACHE_NONE);
118 map_section((int)FRAME, (int)FRAME, 1, BUFFERED); /* enable buffered writing for the framebuffer */ 118
119 /* map RAM to 0 and enable caching for it */
120 map_section(0x30000000, 0, 32, CACHE_ALL);
121
122 /* enable buffered writing for the framebuffer */
123 map_section((int)FRAME, (int)FRAME, 1, BUFFERED);
119} 124}
120 125
121void memory_init(void) { 126void memory_init(void) {
@@ -145,7 +150,7 @@ void s3c_regclr(volatile int *reg, unsigned int mask)
145void system_init(void) 150void system_init(void)
146{ 151{
147 INTMSK = 0xFFFFFFFF; 152 INTMSK = 0xFFFFFFFF;
148 INTMOD = 0; 153 INTMOD = 0;
149 SRCPND = 0xFFFFFFFF; 154 SRCPND = 0xFFFFFFFF;
150 INTPND = 0xFFFFFFFF; 155 INTPND = 0xFFFFFFFF;
151 INTSUBMSK = 0xFFFFFFFF; 156 INTSUBMSK = 0xFFFFFFFF;