diff options
Diffstat (limited to 'firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c')
-rw-r--r-- | firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c | 32 |
1 files changed, 14 insertions, 18 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c index 00be543bb6..6014f4d3af 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c | |||
@@ -38,7 +38,7 @@ static struct | |||
38 | } dma_play_lock = | 38 | } dma_play_lock = |
39 | { | 39 | { |
40 | .locked = 0, | 40 | .locked = 0, |
41 | .state = (0<<19) | 41 | .state = 0, |
42 | }; | 42 | }; |
43 | 43 | ||
44 | /* Last samplerate set by pcm_set_frequency */ | 44 | /* Last samplerate set by pcm_set_frequency */ |
@@ -71,22 +71,18 @@ void pcm_apply_settings(void) | |||
71 | restore_fiq(status); | 71 | restore_fiq(status); |
72 | } | 72 | } |
73 | 73 | ||
74 | /* For the locks, DMA interrupt must be disabled because the handler | 74 | /* Mask the DMA interrupt */ |
75 | manipulates INTMSK and the operation is not atomic */ | ||
76 | void pcm_play_lock(void) | 75 | void pcm_play_lock(void) |
77 | { | 76 | { |
78 | int status = disable_fiq_save(); | ||
79 | if (++dma_play_lock.locked == 1) | 77 | if (++dma_play_lock.locked == 1) |
80 | INTMSK |= (1<<19); /* Mask the DMA interrupt */ | 78 | s3c_regset(&INTMSK, DMA2_MASK); |
81 | restore_fiq(status); | ||
82 | } | 79 | } |
83 | 80 | ||
81 | /* Unmask the DMA interrupt if enabled */ | ||
84 | void pcm_play_unlock(void) | 82 | void pcm_play_unlock(void) |
85 | { | 83 | { |
86 | int status = disable_fiq_save(); | ||
87 | if (--dma_play_lock.locked == 0) | 84 | if (--dma_play_lock.locked == 0) |
88 | INTMSK &= ~dma_play_lock.state; /* Unmask the DMA interrupt if enabled */ | 85 | s3c_regclr(&INTMSK, dma_play_lock.state); |
89 | restore_fiq(status); | ||
90 | } | 86 | } |
91 | 87 | ||
92 | void pcm_play_dma_init(void) | 88 | void pcm_play_dma_init(void) |
@@ -110,11 +106,11 @@ void pcm_play_dma_init(void) | |||
110 | /* Do not service DMA requests, yet */ | 106 | /* Do not service DMA requests, yet */ |
111 | 107 | ||
112 | /* clear any pending int and mask it */ | 108 | /* clear any pending int and mask it */ |
113 | INTMSK |= (1<<19); | 109 | s3c_regset(&INTMSK, DMA2_MASK); |
114 | SRCPND = (1<<19); | 110 | SRCPND = DMA2_MASK; |
115 | 111 | ||
116 | /* connect to FIQ */ | 112 | /* connect to FIQ */ |
117 | INTMOD |= (1<<19); | 113 | s3c_regset(&INTMOD, DMA2_MASK); |
118 | } | 114 | } |
119 | 115 | ||
120 | void pcm_postinit(void) | 116 | void pcm_postinit(void) |
@@ -127,7 +123,7 @@ void pcm_postinit(void) | |||
127 | static void play_start_pcm(void) | 123 | static void play_start_pcm(void) |
128 | { | 124 | { |
129 | /* clear pending DMA interrupt */ | 125 | /* clear pending DMA interrupt */ |
130 | SRCPND = (1<<19); | 126 | SRCPND = DMA2_MASK; |
131 | 127 | ||
132 | _pcm_apply_settings(); | 128 | _pcm_apply_settings(); |
133 | 129 | ||
@@ -135,7 +131,7 @@ static void play_start_pcm(void) | |||
135 | clean_dcache_range((void*)DISRC2, (DCON2 & 0xFFFFF) * 2); | 131 | clean_dcache_range((void*)DISRC2, (DCON2 & 0xFFFFF) * 2); |
136 | 132 | ||
137 | /* unmask DMA interrupt when unlocking */ | 133 | /* unmask DMA interrupt when unlocking */ |
138 | dma_play_lock.state = (1<<19); | 134 | dma_play_lock.state = DMA2_MASK; |
139 | 135 | ||
140 | /* turn on the request */ | 136 | /* turn on the request */ |
141 | IISCON |= (1<<5); | 137 | IISCON |= (1<<5); |
@@ -154,7 +150,7 @@ static void play_start_pcm(void) | |||
154 | static void play_stop_pcm(void) | 150 | static void play_stop_pcm(void) |
155 | { | 151 | { |
156 | /* Mask DMA interrupt */ | 152 | /* Mask DMA interrupt */ |
157 | INTMSK |= (1<<19); | 153 | s3c_regset(&INTMSK, DMA2_MASK); |
158 | 154 | ||
159 | /* De-Activate the DMA channel */ | 155 | /* De-Activate the DMA channel */ |
160 | DMASKTRIG2 = 0x4; | 156 | DMASKTRIG2 = 0x4; |
@@ -182,7 +178,7 @@ static void play_stop_pcm(void) | |||
182 | void pcm_play_dma_start(const void *addr, size_t size) | 178 | void pcm_play_dma_start(const void *addr, size_t size) |
183 | { | 179 | { |
184 | /* Enable the IIS clock */ | 180 | /* Enable the IIS clock */ |
185 | CLKCON |= (1<<17); | 181 | s3c_regset(&CLKCON, 1<<17); |
186 | 182 | ||
187 | /* stop any DMA in progress - idle IIS */ | 183 | /* stop any DMA in progress - idle IIS */ |
188 | play_stop_pcm(); | 184 | play_stop_pcm(); |
@@ -217,7 +213,7 @@ void pcm_play_dma_stop(void) | |||
217 | play_stop_pcm(); | 213 | play_stop_pcm(); |
218 | 214 | ||
219 | /* Disconnect the IIS clock */ | 215 | /* Disconnect the IIS clock */ |
220 | CLKCON &= ~(1<<17); | 216 | s3c_regclr(&CLKCON, 1<<17); |
221 | } | 217 | } |
222 | 218 | ||
223 | void pcm_play_dma_pause(bool pause) | 219 | void pcm_play_dma_pause(bool pause) |
@@ -245,7 +241,7 @@ void fiq_handler(void) | |||
245 | register pcm_more_callback_type get_more; /* No stack for this */ | 241 | register pcm_more_callback_type get_more; /* No stack for this */ |
246 | 242 | ||
247 | /* clear any pending interrupt */ | 243 | /* clear any pending interrupt */ |
248 | SRCPND = (1<<19); | 244 | SRCPND = DMA2_MASK; |
249 | 245 | ||
250 | /* Buffer empty. Try to get more. */ | 246 | /* Buffer empty. Try to get more. */ |
251 | get_more = pcm_callback_for_more; | 247 | get_more = pcm_callback_for_more; |