diff options
Diffstat (limited to 'firmware/target/arm/rk27xx/adc-rk27xx.c')
-rw-r--r-- | firmware/target/arm/rk27xx/adc-rk27xx.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/firmware/target/arm/rk27xx/adc-rk27xx.c b/firmware/target/arm/rk27xx/adc-rk27xx.c new file mode 100644 index 0000000000..c8bbae7514 --- /dev/null +++ b/firmware/target/arm/rk27xx/adc-rk27xx.c | |||
@@ -0,0 +1,47 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2011 Marcin Bukat | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #include "config.h" | ||
23 | #include "cpu.h" | ||
24 | #include "system.h" | ||
25 | #include "kernel.h" | ||
26 | #include "thread.h" | ||
27 | #include "adc.h" | ||
28 | |||
29 | unsigned int adc_scan(int channel) | ||
30 | { | ||
31 | ADC_CTRL = (1<<4) | (1<<3) | (channel & (NUM_ADC_CHANNELS - 1)); | ||
32 | |||
33 | /* wait for conversion ready ~10us */ | ||
34 | while (ADC_STAT & 0x01); | ||
35 | |||
36 | /* 10bits result */ | ||
37 | return (ADC_DATA & 0x3ff); | ||
38 | } | ||
39 | |||
40 | void adc_init(void) | ||
41 | { | ||
42 | /* ADC clock divider to reach max 1MHz */ | ||
43 | SCU_DIVCON1 = (SCU_DIVCON1 & ~(0xff<<10)) | (49<<10); | ||
44 | |||
45 | /* enable clocks for ADC */ | ||
46 | SCU_CLKCFG |= 3<<23; | ||
47 | } | ||