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authorMarcin Bukat <marcin.bukat@gmail.com>2011-05-30 21:10:37 +0000
committerMarcin Bukat <marcin.bukat@gmail.com>2011-05-30 21:10:37 +0000
commit976a1699da373f01dabc9353b34aef261ebf740f (patch)
tree5f1649ceb51d603471e6b1cf5dcb5192626897d6 /firmware/target/arm/rk27xx/adc-rk27xx.c
parent8a5a2b82fd2d35e3eb7afa8f0dc875e3874988bb (diff)
downloadrockbox-976a1699da373f01dabc9353b34aef261ebf740f.tar.gz
rockbox-976a1699da373f01dabc9353b34aef261ebf740f.zip
Rockchip rk27xx port initial commit. This is still work in progress.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29935 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/rk27xx/adc-rk27xx.c')
-rw-r--r--firmware/target/arm/rk27xx/adc-rk27xx.c47
1 files changed, 47 insertions, 0 deletions
diff --git a/firmware/target/arm/rk27xx/adc-rk27xx.c b/firmware/target/arm/rk27xx/adc-rk27xx.c
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@@ -0,0 +1,47 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2011 Marcin Bukat
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23#include "cpu.h"
24#include "system.h"
25#include "kernel.h"
26#include "thread.h"
27#include "adc.h"
28
29unsigned int adc_scan(int channel)
30{
31 ADC_CTRL = (1<<4) | (1<<3) | (channel & (NUM_ADC_CHANNELS - 1));
32
33 /* wait for conversion ready ~10us */
34 while (ADC_STAT & 0x01);
35
36 /* 10bits result */
37 return (ADC_DATA & 0x3ff);
38}
39
40void adc_init(void)
41{
42 /* ADC clock divider to reach max 1MHz */
43 SCU_DIVCON1 = (SCU_DIVCON1 & ~(0xff<<10)) | (49<<10);
44
45 /* enable clocks for ADC */
46 SCU_CLKCFG |= 3<<23;
47}